SUNMONTUEWEDTHUFRISAT
Conferences, Lectures, & Seminars
Events for March
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When Amdahl and Off-die Bandwidth Kill CMP Scaling: Two Tough Problems and Two Radical Solutions
Thu, Mar 01, 2007 @ 10:30 AM - 11:30 AM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
"When Amdahl and Off-die Bandwidth Kill CMP Scaling: Two Tough Problems and Two Radical Solutions"Murali AnnavaramNokia Research Center, Palo AltoAbstract:The continuous increase in transistor density coupled with the simultaneous reduction in chip power budget caused a major paradigm shift in the processor design. The chip industry is moving away from high frequency power hungry uniprocessors towards chip multiprocessors (CMPs) with many lower power cores. The road to CMP scaling, however, has two significant barriers. First, single threaded applications parallelized to take advantage of CMPs will have unavoidable phases of sequential execution. Amdahl's law dictates that the speedup of such parallel programs will be limited by the sequential portion of the computation. The second barrier to CMP scaling is that the off-die bandwidth requirement will grow dramatically as the working set of multi-threaded applications grows with the thread count. Furthermore, increased thread level parallelism results in reduced shared cache locality, as interleaved accesses from multiple threads appear random at the shared cache level. The twofold effects of increased working set size and reduced locality will place significant pressure on the limited number of pins to reach off-die memory.This talk focuses on these two problems and presents two radical solutions. In the first part of this talk, I will present Energy Per Instruction (EPI) throttling -- a novel mechanism for mitigating Amdahl's bottleneck by varying the amount of energy expended to process instructions according to the amount of available parallelism. When a program enters a sequential phase the EPI throttling mechanism assigns all available energy to a single processor so as to execute the sequential phase quickly; conversely, when a program enters a parallel phase energy is distributed to several cores within the CMP so as to process as many instructions in parallel as possible. More generally, using the equation, Power=Energy per instruction (EPI) * Instructions per second (IPS), EPI throttling proposes that during phases of limited parallelism (low IPS) the chip multi-processor will spend more EPI; similarly, during phases of higher parallelism (high IPS) the chip multi-processor will spend less EPI. The performance benefits of an EPI throttle are evaluated on an asymmetric multiprocessor (AMP) prototyped from a physical 4-way Xeon SMP server. Using a wide range of multi-threaded programs, I will show a 38% wall clock speedup using EPI throttled AMP compared to a standard SMP that uses the same power. In the second part of this talk, I will present 3D stacking technology that not only enables stacking large capacity DRAM caches on CMPs but also provides tremendous bandwidth using die to die vias. I will focus on the design challenges of stacking DRAM on CMPs. In particular, I will show that due to the limited DRAM banking the number of page opens increase dramatically as more threads access the DRAM cache. Using detailed simulation results, I will show that, contrary to popular belief, simply stacking a DRAM cache on a CMP does not provide the expected benefits of stacked memory. Using a PC-based stride prefetching mechanism I will show that random page access behavior can be mitigated thereby allowing 3D stacked DRAM to provide the necessary bandwidth and capacity required for CMP scaling.Speaker Bio:Murali Annavaram is a researcher at the Nokia research center in Palo Alto. His current research is focused on exploring mobile device features required for providing location and context-aware computing services. Prior to Nokia he was a senior research scientist at Intel microprocessor research labs where his research spanned the entire spectrum of systems architecture ranging from high level software issues to low level device variations. His research at Intel includes 3D stacking, EPI throttling for power efficient CMP designs, impact of process variability on chip designs, characterizing server workloads for improving simulation and tracing technologies. Murali received his PhD from University of Michigan working with Prof. Ed Davidson focusing on prefetching techniques for irregular applications.Hosted by: Prof. Michel Dubois, dubois@paris.usc.edu
Location: Hughes Aircraft Electrical Engineering Center (EEB) - -248
Audiences: Everyone Is Invited
Contact: Rosine Sarafian
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
New Approaches in Large Systems: Theory and Algorithms
Thu, Mar 01, 2007 @ 02:30 PM - 03:30 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Chandra Nair, Microsoft ResearchAbstract: This talk will contain two parts: The dominant part, as the title suggests, will be about a novel and exciting interplay between various disciplines that has led to new approaches to solve problems in large systems. The second part will address a very well-known information theoretic open problem, i.e. determining the capacity region of a broadcast channel, and I shall present new outer bounds on the set of achievable rates that supersede the existing best known outer bounds.Large systems such as internet, large error correcting codes, gene networks, etc. present a new class of problems that are different from the traditional optimization problems in smaller systems. Instead of seeking exact answers, one is often satisfied with very good approximations that can be computed in an efficient, distributed and robust manner. Further due to the presence of a large system of interacting objects one also expects some generic macroscopic behavior to emerge. These constraints and effects are quite different from the behavior or premises under which the smaller systems have been studied and hence the traditional approaches are insufficient.Over the past few years new approaches from Spin Glass Theory, a branch of statistical physics, have been used to propose solutions and efficient algorithms for hard optimization problems in Electrical Engineering, Computer Science, and more recently in Biological networks. This talk will overview this interplay and focus on some examples: (i) The Random Assignment Problem (RAP), which arises in a variety of practical scenarios; notably in crossbar switch scheduling.
(ii) The Number Partitioning Problem (NPP), which models load balancing and multiprocessor scheduling.
(iii) Designing exact message passing algorithms on loopy graphs.In the first two examples listed above, I shall overview the resolutions of certain conjectures in these problems, conjectures that were motivated by heuristic arguments from Physics.In the second part of the talk, I will address a very traditional problem in multi-user information theory. This concerns obtaining the capacity region of a system with one transmitter and two receivers with private messages, called the broadcast channel, a problem that is still open. In this talk, I will show a new outer bound that is better than the previously best known outer bound due to Korner and Marton (1979).Biography: Chandra Nair is a Post-Doctoral researcher with the theory group at Microsoft Research, Redmond. He obtained his PhD from the Electrical Engineering Department at Stanford University in June 2005. He obtained the Bachelor's degree in Electrical Engineering from IIT, Madras. His research interests are in developing and applying tools from probability, combinatorics and statistical physics to solve discrete optimization problems that arise in large systems, esp. those in Electrical Engineering, Computer Science and very recently, in biological systems. He is also interested in information theory, algorithm design, and networks. He has received the Stanford Graduate Fellowship(2000-2004) and Microsoft Graduate Fellowship(2004-2005) for his graduate studies, and he was awarded the Philips and Siemens(India) Prizes for his undergraduate studies.Host: Giuseppe Caire, caire@usc.eduLocation: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Gerrielyn Ramos
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Probabilistic Binning Transforms with Applications to Computer Science and Coding Theory
Mon, Mar 05, 2007 @ 11:00 AM - 12:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Olgica Milenkovic, University of Colorado, BoulderAbstract: Binning schemes are important combinatorial models used for studying problems arising in biology, financial market analysis, engineering, communication theory, and computer science. When analyzing random binning schemes, it is usually of interest to evaluate some statistics that depends on the characteristics of the distribution of objects (balls) into bins. Due to the inherent mutual dependence of the variables describing the occupancy of the bins, determining the statistics of interest may represent a challenging mathematical task. Often, asymptotic approximation techniques are used instead of a complicated - and usually intractable - exact analysis.We describe a class of invertible probabilistic transforms that result in mapping dependent bin occupancies into independent random variables. When using these transforms, certain statistics of interest can be evaluated in the transform domain and afterwards appropriately inverted to obtain exact expressions. Or, for problems with large parameter sizes, the behavior of the statistics can be deduced directly from the result in the transform domain by referring to a new class of Tauberian theorems. We demonstrate the application of the transform techniques on examples taken from theoretical computer science (finding closed form expressions for combinatorial sums), coding theory (analyzing raptor codes), and bioinformatics (demonstrating the non-randomness of certain repeats in DNA sequences).This is a joint work with Kevin Compton from the University of Michigan, Ann Arbor.Biography: Olgica Milenkovic received her MS degree in mathematics and PhD in electrical engineering from the University of Michigan, Ann Arbor, in 2001 and 2002, respectively. In August 2002, she joined the University of Colorado, Boulder, where she is an Assistant Professor in the Department of Electrical and Computer Engineering. In the summer of 2005, she was a Discrete Mathematics and Theoretical Computer Science (DIMACS) Visitor at Bell Labs, Lucent Technologies. Currently, she is a Visiting Professor at the Center for Information Theory and Applications at the University of California, San Diego. Her research interests include error-control and constrained coding, analysis of algorithms, combinatorics, probability theory, and bioinformatics. For the research on these subjects, she received the NSF Career Award and the DARPA Young Faculty Award.Host: Keith Chugg, chugg@usc.edu
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Gerrielyn Ramos
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Large-Scale Quantum Architectures
Thu, Mar 08, 2007 @ 10:30 AM - 11:30 AM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
"Large-Scale Quantum Architectures"Tzvetan MetodiUniversity of California, DavisAbstract:Quantum computing is an emerging field that offers revolutionary and exciting new means in the way we process, store, and transport information. Moreover, realizing large-scale quantum systems requires advances in science and engineering that are now very close to reality. Such systems will need the orchestration of many classical and quantum parts that fit together into one unified architecture in which each component plays an integral role over the course of the application execution. Therefore, it is important that we draw upon the experiences gained from traditional architectures, to develop a model for a large-scale quantum system that provides the methodology necessary for the many different components to work together.In this talk, I will first present the design of the Quantum Logic Array (QLA) architecture, which tackles critical scalability issues such as the cost of error correction and data distribution over large-distances. To accurately model the performance of the QLA architecture, we employ the ion-trap technology, where every component necessary for universal quantum computation has been demonstrated in the laboratory. However, due to its design approach for maximizing parallelism, the QLA system suffers from large area overhead. To combat the area problem, I describe a different architecture system that uses the concept of hardware specialization employed in traditional architectures. The new architecture is based on the QLA model, but is divided into separately optimized quantum memory hierarchy and logic specific regions. The result is a scalable system design that exploits the available parallelism to balance both quantum and classical resources while both reducing the area of the chip and increasing its performance. I end my talk with a discussion on the many open issues remaining when designing systems to perform quantum computation.Speaker Bio:Tzvetan Metodi received his Bachelors degree in physics from the University of California at Davis. He is currently a 5th year PhD student in Computer Science also at UC Davis and a visiting researcher at UC Santa Barbara for Professor Fred Chong. Tzvetan's current work focuses on the development of balanced architectural models of organization and specialization for emerging nanoelectronic computing devices. While a member of the Quantum Architecture Research Center (QARC), which is organized by faculty at UC Berkeley, University of Washington, MIT, and UC Davis, he spent parts of 2004 and 2006 as a visiting scholar at MIT under the guidance of Professor Isaac Chuang. Tzvetan is the principle author of a book titled "Quantum Computing for Computer Architects" published as part of the Synthesis Lectures on Computer Architecture by Morgan & Claypool Publishers in November, 2006.Hosted by: Prof. Viktor Prasanna, prasanna@usc.edu
Location: Hughes Aircraft Electrical Engineering Center (EEB) - -248
Audiences: Everyone Is Invited
Contact: Rosine Sarafian
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
The Case for Data-Driven Multithreading: Scaling the Memory Wall
Fri, Mar 09, 2007 @ 10:00 AM - 11:00 AM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
CENG SEMINAR SERIES"The Case for Data-Driven Multithreading: Scaling the Memory Wall"Dr. Paraskevas (Skevos) EvripidouDepartment of Computer ScienceUniversity of CyprusAbstract:Over the last five decades computer designers were able to design and build faster and faster computers by relying on improvements on fabrication technologies and architectural/organization optimizations. However, over the last five years the most severe limitations of the sequential model, namely its inability to tolerate long latencies has slowed down the performance gains, forcing the industry to hit the Memory wall. As a result the entire industry had to switch to multiple cores per chip and thus move into the concurrency era. New concurrent models/paradigms are needed in order to fully utilize the potential of Multi-core chips. The Dataflow model is a formal model that can handle concurrency and it can tolerate memory and synchronization latency. Consequently, we propose Data-Driven Multithreading (DDM), as it does not suffer from the above-mentioned limitations. This is because DDM is not based on the von Neumman model of execution but instead on the data-flow model of execution, which is side effect free. Thus, the memory latencies can be tolerated without the huge performance penalties of the von Neumann model. Furthermore, the data-driven scheduling does not require the complexity of the multiple issue and out-of-order mechanisms. Data-Driven Multithreading is a non-blocking multithreading model based on the Decoupled Data-Driven model of execution. This model decouples the synchronization from the computation portions of a program allowing them to execute asynchronously. In this model a thread is scheduled for execution in a dataflow manner, i.e., whenever all of its required data have been produced. As a consequence, no synchronization or communication latencies are experienced. We have demonstrated that DDM can be implemented with regular off-the-shelf microprocessors. Therefore it has the obvious benefit that a system may combine both DDM and the latest microprocessor technology. The core of the DDM implementation is the Thread Synchronization Unit (TSU). TSU is a memory-mapped device attached directly to the processor's bus and provides data-driven thread scheduling to the conventional microprocessor. Data-Driven perfecting improves drastically the hit ratio of the cache and at the same time requires much smaller cache memories. Thus, limiting the power consumption, and reducing further the effect of long memory latencies. Simulation experiments have shown that DDM achieves very respectable speedups.Bio:Skevos Evripidou is a Professor at the department of Computer Science at the University of Cyprus. From 1990 to 1994 he was on the Faculty of the department of Computer Science and Engineering at the Southern Methodist University. He received his Phd in Computer engineering from the University of Southern California in 1990. His current research interests are in Parallel Processing, Computer Architecture, Pervasive and Mobile computing. Dr Evripidou has participated in several projects funded by the European Union, the USA (NSF, DARPA, and DOE) and the Cyprus Research Promotion Foundation. He is a member of the IFIP Working Group 10.3, the IEEE Computer Society and ACM SIGARCH. He is also a member of the Phi Kappa Phi and Tau Beta Pi honor societies. Host: Prof. Viktor Prasanna, prasanna@usc.edu
Location: Hughes Aircraft Electrical Engineering Center (EEB) - -248
Audiences: Everyone Is Invited
Contact: Rosine Sarafian
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Contextuality From a Quantum Information-Theoretic Perspective
Tue, Mar 20, 2007 @ 02:00 PM - 03:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
SPEAKER: Dr. Robert Spekkens, University of CambridgeAbstract: Quantum theory is contextual in the sense that it does not admit a noncontextual hidden variable model, as demonstrated by the Bell-Kochen-Specker theorem. It is interesting to speculate that contextuality might be responsible for certain quantum improvements in information processing tasks, such as, for instance, random access codes and computational speed-ups. As a precursor to such an investigation, it is useful to reconsider the definition of contextuality from a modern quantum information theoretic perspective. I argue that such a perspective leads one naturally to a generalization of the standard notion of contextuality. Using this new definition, one can prove that quantum theory is contextual for preparations, transformations, and unsharp measurements. The possible significance of these results to quantum information theory will be discussed.Bio: Robert Spekkens did his undergraduate degree in Physics at McGill University, and his graduate work was done at the University of Toronto. He was a postdoc at Perimeter Institute for 3 years. Since Jan. 2006, He has been taking up a Royal Society fellowship at the University of Cambridge. Half of his time is spent on quantum information theory and the other half on quantum foundations.Host: Todd Brun, tbrun@usc.edu
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Mayumi Thrasher
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Andrew J. Viterbi Distinguished Lecture
Thu, Mar 22, 2007 @ 05:00 PM - 06:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
The 2007 Viterbi Lecture is hosted by the USC Ming Hsieh Department of
Electrical Engineering and Viterbi School of Engineering"Learning to Teach the Viterbi Algorithm"Prof. Robert J. McElieceCalifornia Institute of TechnologyThursday March 22, 2007Reception: 4:00-5:00PMLecture: 5:00-6:15PMGerontology AuditoriumAbstract: One of Andrew Viterbi's most important contributions to modern technology is the celebrated Viterbi Algorithm, which is the cornerstone of modern coding theory. I have taught the Viterbi Algorithm to many generations of Caltech students using a variety of pedagogical devices, including string models, multilevel transparencies, and computer animations. In this talk I will discuss these methods as well as others, and what I have learned by teaching the Viterbi Algorithm.Bio:Robert J. McEliece is currently the Allen E. Puckett Professor and Professor of Electrical Engineering, at the California Institute of Technology. He has also been a regular consultant at the Caltech's Jet Propulsion Laboratory. At JPL Dr. McEliece has contributed to the design and analysis of numerous coded interplanetary telecommunication systems, for example the Golay coded non-imaging system for the Voyager spacecraft, and the Big Viterbi Decoder, which has been used by the Galileo, Pathfinder, Cassini, and Mars Rover missions. As a faculty member at Caltech, he has five times won awards for excellence in teaching, and mentored more than 30 Ph.D. students. From 1990-1999, he served as Executive Officer for Electrical Engineering, and under his leadership Caltech's small (15 FTE) EE Department rose to rank 5th nationally. Dr. McEliece is the author of three textbooks and more than 250 research articles, jointly with more than 100 coauthors. Among his research accomplishments are "McEliece's Theorem," on weight divisibility in cyclic codes, the "JPL Bound" (jointly with Eugene Rodemich, Howard Rumsey, and Lloyd Welch), which has been the world record-holder in the basic combinatorial problem of coding since 1977, and which was selected for a Information Theory Society Golden Jubilee Award in 1998, the ``McEliece public-key cryptosystem,'' which has withstood the attacks of cryptanalysts for more than 25 years, and "repeat-accumulate codes" (jointly with Dariush Divsalar and Hui Jin), which bridge the gap between turbo-codes and LDPC codes. He won the 1998 Leonard G. Abraham Prize for his paper (joint with David MacKay and Jung-fu Cheng) "Turbo decoding as an instance of Pearl's belief propagation algorithm," and was awarded an IEEE Third Millenium Medal in 2000. In 2004 he was awarded the IEEE Information Theory Society's Shannon Prize. Dr. McEliece is a member of the American Mathematical Society, a Fellow of the IEEE, a past president of the IEEE Information Theory Society, and a member of the National Academy of Engineering.Location: Ethel Percy Andrus Gerontology Center (GER) - ontology Auditorium
Audiences: Everyone Is Invited
Contact: Rosine Sarafian
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Achieving Secure Communication Over Wireless Channels
Mon, Mar 26, 2007 @ 10:45 AM - 11:45 AM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Yingbin Grace Liang,
Princeton UniversityAbstract: In this talk, I will begin with an overview of research in information theory for wireless communications, including a summary of my contributions to this area. The main focus of the talk will be on my recent work on information-theoretic security for wireless communication networks.Two basic wireless communication scenarios are broadcast communication from one transmitter to multiple receivers and multiple access communication from multiple transmitters to one receiver. While security issues were addressed for broadcast communication by Wyner, Csiszar and Korner in 70's, security issues in multiple access communication have been open for three decades. In this talk, I will present our work towards resolving these open problems.I will first introduce the channel that we have identified to model wireless multiple access communication, where security issues arise naturally. For this channel, we have developed novel techniques to characterize reliable communication rates under secrecy constraints (possibly perfect secrecy). I will also postulate the general coding design principles that are essential to achieve secure communication.Biography: Yingbin Liang received the Ph.D. degree in Electrical Engineering from the University of Illinois at Urbana-Champaign in 2005. Since September 2005, she has been working as a postdoctoral research associate at Princeton University. Her research interests include wireless communications and networks, information security, and information theory.Dr. Liang was a Vodafone Fellow at the University of Illinois at Urbana-Champaign during 2003-2005, and received the Vodafone-U.S. Foundation Fellows Initiative Research Merit Award in 2005. She also received the M. E. Van Valkenburg Graduate Research Award from the ECE department, University of Illinois at Urbana-Champaign, in 2005.Host: Giuseppe Caire, caire@usc.edu
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Gerrielyn Ramos
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
WiBro - A 2.3GHz Mobile WiMAX System: Standards, System Development and Deployment
Tue, Mar 27, 2007 @ 03:30 PM - 04:30 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
SPEAKER: Dr. Byeong Gi Lee, Seoul National UniversityABSTRACT: WiBro is a 2.3 GHz based Mobile WiMAX system that realizes the IEEE 802.16e standards. WiBro system was developed very recently and is currently being deployed for commercial services for the first time. The Mobile WiMAX/WiBro system distinguishes itself by the three distinctive features, namely, broadband, IP and mobility. It provides high-speed data services over 19/5Mbps downlink/upling in its initial stage, which is likely to be doubled in the second stage. It fully employs the IP technology, differently from the existing cellular systems such as WCDMA/HSDPA and cdma2000/EV-DO. In addition, it can provide high-rate data services to the mobile users moving over 120 km/h. In multiple access, it distinguished itself from the existing cellular mobile systems in that it employs the OFDMA technology, not the CDMA or TDMA technology. In this aspect, the Mobile WiMAX/WiBro system is viewed as an early version of the 4th generation wireless systems. The technical presentation will introduce Mobile WiMAX/WiBro in the scope of system overview, standards, system development and deployment. It will include illustrations of the systems that have been developed by Samsung Electronics and the trial/commercial services that were recently begun by KT.Bio: Byeong Gi Lee received the BS degree from Seoul National University and the Ph.D. degree from UCLA, and then worked for Granger Associates, Santa Clara, and AT&T Bell Laboratories, North Andover, before joining the faculty of Seoul National University in 1986, where he served as the Director of the Institute of New Media and Communications and the Vice Chancellor for Research. Dr. Lee was the founding chair of the Joint Conference of Communications and Information (JCCI), the steering committee chair of the Asia Pacific Conference on Communications (APCC), and the founding committee chair of the Accreditation Board for Engineering Education of Korea (ABEEK). He served as the TPC Chair of IEEE International Conference on Communications (ICC) 2005 and as the President of Korea Society of Engineering Education (KSEE). He served as the Editor (in chief) of the IEEE Global Communications Newsletter, an Associate Editor of the IEEE Transactions on CSVT, and the founding Associate Editor-in-Chief and the Editor-in-Chief of the Journal of Communications and Networks (JCN). He served for the IEEE Communications Society (ComSoc) as the Director of Membership Programs Development, as the Director of Asia Pacific Region, as the Director of Magazines and as a Member-at-Large to the Board of Governors. He currently serves as the Vice President for Membership Development of IEEE ComSoc, as the President of Korea Institute of Communication Sciences (KICS) and as a Vice President of the ABEEK. He is the founder and the first President of the Citizens' Coalition for Scientific Society (CCSS), a non-government organization for the advancement of science and technology in Korea, a member of Presidential Advisory Council on Science and Technology, and a member of Presidential Advisory Committee for Policy Planning. Dr. Lee is a co-author of Broadband Telecommunication Technology, 1st & 2nd editions, (Artech House), Scrambling Techniques for Digital Transmission (Springer Verlag), Scrambling Techniques for CDMA Communications (Kluwer), and Integrated Broadband Networks (Artech House). He holds seven U.S. patents with four more patents pending. His current fields of interest include broadband networks, wireless networks, communication systems, and signal processing. He received the 1984 Myril B. Reed Best Paper Award, Exceptional Contribution Awards of AT&T Bell Laboratories, a Distinguished Achievement Award of KICS, the 2001 National Academy of Science (of Korea) Award, and the 2005 Kyung-am Academic Award. He is a Member of the National Academy of Engineering of Korea, a Member of Sigma Xi, and a Fellow of the IEEE.
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Mayumi Thrasher
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Wireless propagation channels and their impact of system design
Thu, Mar 29, 2007 @ 10:00 AM - 11:00 AM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Andreas Molisch,
Lund UniversityAbstract: This talk has the central premise that a good understanding of the wireless propagation channel is vital for system design and simulation. This premise is emphasized by means of several examples from the areas of multi-antenna systems, co-operative communications, and ultrawideband (UWB) systems. In the multi-antenna case, we first present a number of channel measurement and modeling techniques. We then discuss the impact of the channels on the efficiency of antenna subset selection, a technique that reduces the complexity of MIMO systems by using only a small number of RF up/downconversion chains and connecting them adaptively to the "best" antenna elements. Next, we turn our attention to co-operative communications, and show how the correlation between fading at different nodes influences the optimum cooperation strategies. Finally, we explore UWB communications. After an overview of the special properties of UWB channels and their impact on Rake receivers, we explore in detail a new modulation format that is especially useful in heterogeneous networks. The modulation format can be received by transmitted-reference as well as coherent receivers, and gives almost-optimum performance for each of those receiver types. We will discuss both mathematically and intuitively the performance of this scheme in different propagation channels.Biography: Andreas F. Molisch is Professor and Chairholder for Radio Systems at Lund University, Sweden, and Deputy Director of the SSF National Center of Excellence for High-Speed Wireless Communications. He is simultaneously Distinguished Member of Technical Staff at Mitsubishi Electric Research Labs in Cambridge, MA, USA. Previously, he worked at the Technical University of Vienna, the Research Center for Telecommunications Vienna, and AT&T Bell Laboratories. His current research interests are measurement and modeling of wireless propagation channels, ultrawideband communications, MIMO systems, and cooperative communications. He has authored, co-authored, or edited four books (among them the recent textbook "Wireless Communications"), 11 book chapters, some 100 journal papers, and numerous conference contributions. He has been chairman of a number of international standardization groups, international conferences and symposia, and editor for IEEE journals. Dr. Molisch is a Fellow of the IEEE and recipient of several awards.Host: Robert Scholtz, scholtz@usc.edu
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Gerrielyn Ramos
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Bridging VLSI Design and Manufacturing
Thu, Mar 29, 2007 @ 01:30 PM - 02:30 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
"Bridging VLSI Design and Manufacturing"Puneet GuptaUniversity of California, San DiegoAbstract:The semiconductor industry is at an interesting-and scary-juncture. Design and manufacturing NRE (nonrecurring engineering) costs for a state-of-the-art chip can reach several tens of millions of dollars; this makes the transition to newer processes economically infeasible for low- to medium-volume IC products. Scaling of physical dimensions faster than the optical wavelengths or equipment tolerances used in the manufacturing line has led to increased process variability. This in turn has led to unpredictable design, unpredictable manufacturing, and low yields. As a result of the above trends, future power, performance and cost improvements cannot come from the manufacturing process alone; they depend significantly on design automation technology. Such "equivalent scaling" improvements - perhaps as much as one full technology generation - must come from new synergies between various "silos" of the design to manufacturing flow. Today, design for manufacturing ("DFM") is the new buzzword in design automation, manufacturing automation, semiconductor and semiconductor equipment industries alike. My work in this still-nascent research area has developed new bidirectional data flows and techniques that bridge design and manufacturing, and that address the challenges of (1) high cost of design, (2) high cost of manufacturing, (3) low manufacturing yield, and (4) disconnects between design and the manufacturing process. In this talk, I will first briefly sketch the design and manufacturing flows, then show how the challenges of low predictability and high variability in modern integrated circuits can be addressed by new design techniques that are explicitly aware of manufacturing limitations. I will give examples of how leakage power variability and timing variability can be mitigated by such manufacturing-aware design methods. I will also give examples of new design-aware manufacturing flows that better capture the designer's intent in silicon. The talk will conclude with several directions for future research.Bio:Puneet Gupta received the B.Tech degree in Electrical Engineering from Indian Institute of Technology, Delhi in 2000. He joined the Electrical and Computer Engineering department at University of California, San Diego in 2001 where he is currently a Ph.D. candidate. He has been at Blaze DFM Inc. since 2004 as co-founder and product architect. Puneet's research has focused on building high-value bridges between physical design and semiconductor manufacturing for lowered cost, increased yield and improved predictability of integrated circuits. He has authored over 40 papers and is a recipient of IBM Ph.D. fellowship. He holds one US patent and has 12 pending. He has given tutorial talks at ICCAD, WesCon, CMP-MIC, UC Santa Cruz and UC San Diego and is a short-course instructor at SPIE Advanced Lithography, 2007.Hosted by: Prof. Sandeep Gupta, sandeep@usc.edu
Location: Hughes Aircraft Electrical Engineering Center (EEB) - -248
Audiences: Everyone Is Invited
Contact: Rosine Sarafian
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Life in an Industrial Central Research Laboratory: An Insiders View
Fri, Mar 30, 2007 @ 10:00 AM - 11:00 AM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
SPEAKER: Dr. Douglas Baney, Agilent LaboratoriesAbstract: The industrial central research laboratory has undergone major transformations in the past couple of years. Labs that have successfully managed technology creation and its transition to commercialization continue to flourish. Doug will talk about his experiences in Agilent Labs, the central research arm of Agilent Technologies, and characteristics of a successful industrial research laboratory. He will provide examples of some of the projects that the Labs have investigated, and comment on attributes of projects and of researchers who have excelled in this environment. Questions are definitely welcome.Biography: Doug Baney has 25 years of industrial experience in both central research laboratories and in R&D centers directly tied to product development. He has worked as an R&D microwave engineer in Hewlett-Packard's signal analysis business unit where he designed millimeter wave down converters for spectrum analyzers. In the late 1980s, he helped launch Hewlett-Packard's lightwave instruments business in his role as a photonics instrument R&D engineer within a product business unit. In 1991 he joined Hewlett-Packard Laboratories, the central research laboratory for Hewlett-Packard, where he conducted research in various optical and opto-electronic technologies including laser displays, low-coherence optical reflectometry, optical amplifier characterization, ZBLAN rare-earth doped fiber upconversion lasers and optical components. Since then he has been promoted to Project Manager, and now Manager of the Measurements & Sensors Department of Agilent Laboratories, the central research laboratory of Agilent Technologies, Inc. Doug holds the BSEE, MSEE and Ph.D. degrees from Cal Poly, UCSB, and the Ecole Nationale Superieure des Telecommunications, Paris, France respectively. He has chaired major international conferences such as OFC and OAA, he has published widely in the area of photonics measurements, and he is a Senior Member of the IEEE.Host: Alan Willner, willner@usc.edu
Location: Hughes Aircraft Electrical Engineering Center (EEB) - -108
Audiences: Everyone Is Invited
Contact: Mayumi Thrasher
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Cache Architecture and Mapping for Packet Forwarding Applications
Fri, Mar 30, 2007 @ 10:30 AM - 11:30 AM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
CENG SEMINAR SERIES"Cache Architecture and Mapping for Packet Forwarding Applications"Prof. Govind RamaswamySupercomputer Education and Research CentreIndian Institute of ScienceAbstract:Packet forwarding is a memory-intensive application requiring multiple accesses through a trie structure. With the requirement to process packets at line rates high performance routers need to forward millions of packets every second. Even with an efficient lookup algorithm like the LC-trie, each packet needs up to 5 memory accesses. Earlier work shows that a single cache for the nodes of an LC-trie can reduce the number of external memory accesses. We propose a Heterogeneous Segmented Cache Architecture (HSCA) for packet forwarding application that exploits the significantly different locality characteristics of accesses to level-one and the lower-level nodes of an LC-trie. Further, we improve the hit rate of the cache for level-one nodes, which are accessed more than 80% of the time, by introducing a novel two-level mapping based cache placement scheme to reduce conflict misses.Performance results reveal that our base HSCA scheme reduces the number of misses incurred with a unified scheme by as much as 25%, leading to a 32% speedup in average memory access time. Two-level mapping further enhances the performance of the base HSCA by up to 13% leading to an overall improvement of up to 40% over the unified scheme.Bio:Govindarajan Ramaswamy received his B.Sc. degree in Mathematics from Madras University in 1981 and B.E. (Electronics and Communication) and Ph.D. (Computer Science) degrees from the Indian Institute of Science, Bangalore in 1984 and 1989 respectively. He has held post-doctoral and faculty positions in Canadian Universities between 1989-95. Since 1995 he has been a faculty in the Supercomputer Education and Research Centre and the Department of Computer Science and Automation, Indian Institute of Science, Bangalore, India. His research interests are in the areas of High Performance Computing, compilation techniques for instruction-level parallelism, and computer architecture.Host: Prof. Viktor Prasanna, Ext. 04483
Location: Hughes Aircraft Electrical Engineering Center (EEB) - -248
Audiences: Everyone Is Invited
Contact: Rosine Sarafian
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
ALL-OPTICAL CONTROL ON A CHIP
Fri, Mar 30, 2007 @ 11:00 AM - 12:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
SPEAKER: Prof. Benjamin J. Eggleton, ARC Federation Fellow, CUDOS Director, University of Sydney, AustraliaAbstract: My talk will overview the research highlights of CUDOS, an Australian Research Council Centre of Excellence. CUDOS is a research consortium between five Australian Universities: The University of Sydney, Macquarie University, University of Technology Sydney, Australian National University and Swinburne University of Technology. The CUDOS research program has two central themes: nanophotonics and nonlinear photonics. Our goal of achieving ultra-high-speed, all-optical signal processing on a single photonic chip is addressed by combining these two themes to develop micron-scale photonic components incorporating nonlinear photonics processes. This talk will review progress on CUDOS flagship projects that represent ambitious cross-node collaborations toward this goal: i) Dispersionless slow light in photonic crystals; (ii) Chalcogenide-based all-optical switching and regeneration schemes based on low-loss waveguides and photonic crystals; and (iii) optofluidic tunable photonic components.Biography: Benjamin Eggleton is currently an ARC Federation Fellow and Professor of Physics at the University of Sydney. He is Director of the Centre for Ultrahigh-bandwidth Devices for Optical Systems (CUDOS), an ARC Centre of Excellence. He studied at the University of Sydney, obtaining his BSc (Hons 1) in 1992 and his PhD in Physics in 1996. After graduation, he went to the United States to join Bell Laboratories, as a Postdoctoral Fellow in the Optical Physics Department. He then transferred to the Optical Fiber Research Department as a Member of Technical Staff and was subsequently promoted to Technical Manager of the Optical Fibre Grating group. Soon after this, he became the Research Director of the Specialty Fiber Business Division of Bell Lab's parent company, Lucent Technologies; here, he drove Lucent's research program in optical fibre devices. He has co-authored more than 180 journal papers, has presented more than 40 invited and plenary presentations at international conferences, and has filed 35 patents. He has received several significant awards. Most notably, in 2004 he received the Prime Minister's Malcolm McIntosh Science Prize for Physical Scientist of the Year, in 2003 the ICO Prize (International Commission for Optics), and in 1998 was awarded the Adolph Lomb Medal from the Optical Society of America. Prof Eggleton will be presented with the 2007 Pawsey Medal from the Australian Academy of Sciences. Other achievements include the award of the distinguished lecturer award from the IEEE/LEOS, an R&D100 award, and being made an OSA fellow in 2003. He is an Associate Editor for IEEE Photonic Technology Letters, a member of the editorial advisory board for Optics Communications and serves as Vice-President of the Australian Optical Society.Host: Alan Willner, willner@usc.edu
Location: Hughes Aircraft Electrical Engineering Center (EEB) - -108
Audiences: Everyone Is Invited
Contact: Mayumi Thrasher
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
High Speed Polarization Independent Signal Processing using Nonlinear Optics
Fri, Mar 30, 2007 @ 02:00 PM - 03:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
SPEAKER: Professor Thomas E. Murphy, University of MarylandAbstract: In present-day optical networks, signal processing is performed with high-speed electrical circuits. Although electronic circuits perform well at speeds up to 40 Gb/s, in future networks the data rate could exceed the speed of conventional electronics. One solution to this problem is to replace costly high-speed electronic functions with ultrafast nonlinear optical processes.While many nonlinear effects have been exploited for optical signal processing, most have the disadvantage that they depend on the incoming polarization state, which cannot be easily controlled in fiber-optic networks. This polarization dependence is an obstacle that stands in the way of replacing electronic signal processing with optical rocessing. In this talk, I will discuss ongoing research at the University of Maryland to develop polarization insensitive nonlinear optical processing techniques for use in high-speed networks.Biography: Thomas Murphy studied physics and electrical engineering at Rice University, graduating with joint degrees in 1994. He then joined the NanoStructures Laboratory at MIT, where he pursued research in integrated optics and nanotechnology. He completed his M.S. degree in 1997 and his Ph.D. in 2000, both in Electrical Engineering. In 2000, he joined MIT Lincoln Laboratory as a staff member in the Optical Communications Technology Group where he studied ultrafast optical communications systems. In August 2002, he joined the faculty at the University of Maryland, College Park as an assistant professor in the Department of Electrical and Computer Engineering. Thomas is a member of the Optical Society of America, the IEEE, Tau Beta Pi, and Sigma Xi, and a recent recipient of the NSF CAREER award. His research interests include optical communications, short-pulse phenomena, numerical simulation, optical pulse propagation, nanotechnology, terahertz and microwave photonics, and integrated optics.Host: Alan Willner, willner@usc.edu
Location: Hughes Aircraft Electrical Engineering Center (EEB) - -108
Audiences: Everyone Is Invited
Contact: Mayumi Thrasher
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor.
