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Events for April 04, 2014
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Manifold Constrained Acoustic Modeling for Automatic Speech Recognition
Fri, Apr 04, 2014 @ 10:00 AM - 11:00 AM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Richard Rose, McGill University
Talk Title: Manifold Constrained Acoustic Modeling for Automatic Speech Recognition
Abstract: This presentation investigates the application of manifold learning approaches to automatic speech recognition (ASR). All of the approaches considered rely on very high dimensional feature representations for speech while at the same time assuming that speech features are constrained to lie on a low dimensional embedded manifold. Discriminative manifold based linear projections are investigated as dimensionality reducing feature space transformations. These techniques attempt to preserve local within-class relationships along a nonlinear manifold while maximizing separability between classes. The ASR word error rates obtained from these techniques are compared to those obtained using more well known discriminative dimensionality reducing linear transformations on multiple speech in noise tasks. The high computational complexity associated with computing the Laplacian matrices for these techniques is reduced by an order of magnitude through the use of locality sensitive hashing (LSH) algorithms. As time permits, a discussion of additional applications of manifold based constraints to speech processing will be presented. These include manifold based constraints for regularizing training for speaker adaptation transformations, regularized least squares classifiers for spoken term detection, and manifold regularization for training deep neural networks.
Biography: Richard Rose is an Associate Professor and Graduate Program Director of Electrical and Computer Engineering at McGill University in Montreal, Quebec, Canada. His major area of research is in speech and language processing. His recent research contributions have been in acoustic modeling for speech recognition, computer aided human language translation, and computer aided speech therapy. Over his career, he has published over 130 articles in refereed international journals and conference proceedings. He has served as Adjunct Research Scientist at the Human Language Technology Center of Excellence in Baltimore and as Adjunct Professor of ECE at Johns Hopkins University. Prof. Rose is an IEEE Fellow. Before coming to McGill in 2004, Prof. Rose was a senior member of technical staff at AT&T Labs Research where he contributed to AT&T's speech enabled services and was inventor or co-inventor on twelve patents. His professional service has included General Chair of the IEEE Automatic Speech Recognition and Understanding Workshop, membership in the IEEE Speech Technical Committee, elected membership on the IEEE Signal Processing Society Board of Governors, associate editor of the IEEE Transactions on Speech and Audio Processing, associate editor of the IEEE Transactions on Audio, Speech, and Language Processing, and founding editor of the IEEE Speech Technical Committee Newsletter. Prof. Rose is a member of Tau Beta Pi, Eta Kappa Nu,
and Phi Kappa Phi.
Host: Prof. Shrikanth Narayanan & Alexandros Potamianos
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 132
Audiences: Everyone Is Invited
Contact: Talyia Veal
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Integrated Systems Seminar Series - Spring 2014
Fri, Apr 04, 2014 @ 03:30 PM - 05:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Mircea Stan, University of Virginia
Talk Title: Breaking 3D Power Delivery Walls Using Voltage Stacking
Series: Integrated Systems Seminar Series
Abstract: The power delivery walls include: power density (power consumption density increases beyond the heat dissipation capabilities of the technology), power and ground power delivery pins (chip power consumption requires increasing numbers of pins), 3DIC power density (physical stacking in the third dimension exacerbates the two dimensional explosion), on chip power regulation efficiency (relatively poor efficiencies achievable with on chip regulators limit the effectiveness of many low power schemes). In this talk we demonstrate how voltage stacking is a comprehensive method for addressing the power delivery walls above, with special emphasis on 3DIC.
Biography: Mircea R. Stan received the Ph.D. and M.S. degrees in Electrical and Computer Engineering from the University of Massachusetts at Amherst and the Diploma in Electronics and Communications from "Politechnica" University in Bucharest, Romania. Since 1996 he has been with the Department of Electrical and Computer Engineering at the University of Virginia, where he is now a professor. Prof. Stan is teaching and doing research in the areas of high performance, low power VLSI, temperature aware
circuits and architecture, embedded systems, and nanoelectronics. He has more than 8 years of industrial experience and 16 years of academic experience, has been a visiting faculty at UC Berkeley in 2004-2005, at IBM in 2000, and at Intel in 2002 and 1999. He has received the NSF CAREER award in 1997 and was a coauthor on best paper awards at ISQED 2008, GLSVLSI 2006, ISCA 2003 and SHAMAN
2002. He was the chair of the VLSI Systems and Applications Technical Committee (VSATC) of IEEE CAS in 2005-2007, general chair for ISLPED 2006 and GLSVLSI 2004, TPC chair for NanoNets 2007 and ISLPED 2005 and a Distinguished Lecturer for IEEE SSCS in 2007-2008, and for IEEE CAS in 2004-2005.
Host: Hossien Hashemi, Mike Chen, Mahta Moghaddam, Sushil Subramanian
More Info: http://mhi.usc.edu/activities/integrated-systems/
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Sushil Subramanian
Event Link: http://mhi.usc.edu/activities/integrated-systems/
