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Events for October 08, 2012
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Noisy Text -- Techniques and Tools for Prosodic Analysis
Mon, Oct 08, 2012 @ 01:30 PM - 03:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Andrew Rosenberg, Queens College (CUNY)
Talk Title: Noisy Text -- Techniques and Tools for Prosodic Analysis
Abstract: Prosody is a crucial component to human spoken communication. A number of phonological models of prosody have been proposed to facilitate empirical testing of linguistic hypotheses. The incorporation of categorical/ symbolic prosodic information into spoken language processing systems remains limited. A more common approach to incorporating prosodic information into spoken language processing applications has been the direct incorporation of acoustic/prosodic features into a feature vector.
This talk will discuss issues around symbolic modeling of prosody including some reasons for why direct modeling has been more prolific than symbolic modeling. Particular focus will be given to recent improvements to AuToBI, a toolkit for automatic ToBI labeling, in terms of feature representation, classification approaches, and software engineering. I'll also cover some recent applications of prosodic analysis to spoken language processing tasks including pronunciation modeling, keyword search, and classification of speaking style and nativeness.
Biography: Andrew Rosenberg is an Assistant Professor of Computer Science at Queens College (CUNY). His research concerns spoken language processing and machine learning. He received his Ph.D. from Columbia University in 2009. His dissertation, and much of his research has focused on techniques and applications of automatic prosodic analysis on which he has written over 30 papers. Andrew Rosenberg also contributed to the IBM Jeopardy! Challenge, working with the speech synthesis team to improve Watsonâs voice.
Host: Prof. Shrikanth Narayanan
Location: Ronald Tutor Hall of Engineering (RTH) - 320
Audiences: Everyone Is Invited
Contact: Mary Francis
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System-level performance analysis for programmable MPSOC architectures
Mon, Oct 08, 2012 @ 03:45 PM - 04:45 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Patrick Lysaght, Senior Director, Xilinx Research Labs
Talk Title: System-level performance analysis for programmable MPSOC architectures
Abstract: As we transition into the âpost-PC eraâ, embedded systems increasingly deploy heterogeneous, multi-processor system-on-chip (MPSOC) architectures. This talk is about system-level, design optimization in programmable, heterogeneous, MPSOC architectures for embedded applications. The focus is on programmable SOC platforms which integrate both embedded processors and field programmable gate arrays (FPGAs). The Xilinx Zynq family of All Programmable Systems on Chips is used as the reference. Zynq is the first programmable MPSOC family to integrate Xilinx FPGA fabric with ARM Cortex A9 processors in a high-performance, low-power 28nm process technology co-designed by Xilinx and TSMC.
System-level design optimization is important for the silicon architects who create the All Programmable Zynq device architectures and for the application architects who are responsible for mapping their applications to Zynq devices. The silicon and application architects share many of the same concerns, but they have very different perspectives. For example, static power consumption is a shared concern but an application-specific goal such as âfaces recognized per secondâ is a metric only relevant to a particular application. For business and cost reasons, the design environments and tools available to both groups are also markedly different.
We focus in this talk on performance analysis and estimation. We address the experiences of the silicon architect and the application architect emphasizing what is common to both and also the significant differences. The goal is to work towards more efficient methodologies and tools capable of working at high levels of design abstraction while maximizing silicon efficiency.
Biography: Patrick Lysaght is a Senior Director in Xilinx Research Labs, in Xilinx San Jose, Ca. He leads a group whose research interests include system-level performance analysis and estimation, dynamically reconfigurable systems, and emerging design technologies for FPGAs. He also directs the worldwide operation of the Xilinx University Program (XUP). Before joining Xilinx, he held positions as a senior lecturer at the University of Strathclyde (Glasgow) and at the Institute for System Level Integration (Livingston, Scotland). He started his career in research and development with Hewlett Packard (Edinburgh) before going on to hold a number of technical and marketing positions. Patrick has co-authored more than fifty technical papers, co-edited two books on programmable logic and holds eight US patents. He is actively involved in the organization of a number of international conferences and is chairman of the steering committee for FPL, the worldâs largest conference dedicated to field programmable logic. Patrick holds a BSc (Electronic Systems) from the University of Limerick, Ireland and a MSc degree (Digital Techniques) from Heriot-Watt University in Edinburgh, Scotland.
Host: Professor Viktor K. Prasanna
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Janice Thompson
