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Conferences, Lectures, & Seminars
Events for April
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EE-Systems Seminar
Tue, Apr 01, 2014 @ 10:30 AM - 12:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Nam Sung Kim , Associate Professor, University of Wisconsin-Madison
Talk Title: Performance-Power Trade-off without DVFS: An Architecture and Runtime Joint Approach
Abstract: Providing a sufficient voltage/frequency (V/F) scaling range is critical for effective power management. However, it has been fraught with decreasing nominal operating voltage and increasing process variability that makes it harder to scale the minimum operating voltage (VMIN). Facing such a challenge, we first propose to jointly scale (i) the resources of cores (e.g., the size of on-chip memories, the number of execution units, etc.) and (ii) the number of operating cores to maximize performance of multi-core processors under the maximum power constraint; scaling (i) is adopted as a mean to compensate for a lack of V/F scaling range while scaling (ii) is to exploit the effect of spreading threads over more or fewer cores and scaling shared resources on performance. Under the power constraint, disabling resources of each core allows us to increase the number of operating cores, and vice versa (dubbed resource and core scaling (RCS)). We demonstrate that the best RCS configuration for a given application can improve performance by 21%. Second, we propose a runtime system that predicts the best RCS configuration for a given application and adapts the processor accordingly at runtime. The runtime system only needs to examine a small fraction of runtime to predict the optimal RCS configuration with accuracy well over 90%, whereas the runtime overhead of prediction and adaptation is small.
Finally, we demonstrate that selectively scaling the re-sources in RCS (sRCS) considering on application's characteristics can offer higher performance than uniformly scaling them (i.e., RCS). sRCS can provide 6% higher performance than RCS.
Biography: Nam Sung Kim is an Associate Professor at the University of Wisconsin-Madison. He has been conducting interdisciplinary research that cuts across device, circuit, architecture, and runtime system for power-efficient computing. His research has been supported by National Science Foundation (NSF), Semiconductor Research Corporation (SRC), Defense Advanced Research Project Agency (DARPA), BAE Systems, AMD, IBM, Samsung, and Microsoft; the total funding amount provided/pledged by these agencies is nearly 3.5 million dollars to date. Prior to joining the University of Wisconsin-Madison, he was a senior research scientist at Intel from 2004 to 2008, where he conducted research in power-efficient digital circuit and processor architecture.
Nam Sung Kim has published more than 100 refereed articles to highly-selective conferences and journals in the field of digital circuit, processor architecture, and computer-aided design. The top five most frequently cited papers have more than 2500 combined citations and the total number of combined citations of all his papers exceeds 4000 according to Google Scholar. He also has served several prominent international conferences as a technical program committee member. He was a recipient of IEEE Design Automation Conference (DAC) Student Design Contest Award in 2001, Intel Fellowship in 2002, and IEEE International Conference on Microarchitecture (MICRO) Best Paper Award in 2003, NSF CAREER Award in 2010, and IBM Faculty Award in 2011 and 2012, and he was early-tenured in 2013. His current research interest is designing robust and power-efficient computing systems. He is an IEEE senior member and holds a Ph.D. degree in Computer Science and Engineering from the University of Michigan-Ann Arbor, and both M.S. and B.S. degrees in Electrical Engineering from Korea Advanced Institute of Science and Technology.
Host: Prof. Murali Annavaram
More Information: print_Kim.pdf
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Estela Lopez
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Emerging Nonvolatile Memory Technologies: Design Space Exploration and Applications in Conventional and Neuromorphic Computing
Wed, Apr 02, 2014 @ 10:30 AM - 12:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Yiran Chen, University of Pittsburgh
Talk Title: Emerging Nonvolatile Memory Technologies: Design Space Exploration and Applications in Conventional and Neuromorphic Computing
Abstract: The severe scaling challenges of mainstream memories motivated recent active research on emerging nonvolatile memory (eNVM) technologies. Some promising candidates, i.e., phase change memory, spintronic memory, and resistive memory (memristor), have been well studied, demonstrating attractive properties in integration density, power efficiency, reliability, and scalability. In this talk, I will first examine the expectations of modern computing systems on memory hierarchy and then introduce three examples in eNVM design and applications in GPGPU and neuromorphic computing systems. Finally, we will give our prospects on the future hotspots in eNVM research.
Biography: Dr. Yiran Chen received B.S and M.S. (both with honor) from Tsinghua University and Ph.D. from Purdue University in 2005. After five years in industry, he joined University of Pittsburgh in 2010 as Assistant Professor in Electrical and Computer Engineering Department. His research interests include low-power design, emerging circuit and computing technologies, and embedded systems. Dr. Chen has published 1 book, a few book chapters, and 160+ journal and conference publications. He has been granted 83 US and international patents with other 17 pending applications. He is the associate editor of IEEE TCAD, ACM JETC, ACM SIGDA E-news and served on the technical and organization committees of about 30 conferences. He received 3 best paper awards from ISQED’08, ISLPED’10 and GLSVLS’13 and other 7 nominations in DAC, DATE, ASPDAC etc. Dr. Chen received NSF CAREER award in 2013 and was the invited participant of 2013 U.S. Frontiers of Engineering Symposium of NAE.
Host: Massoud Pedram
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Annie Yu
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
EE Seminar: Robust System Design
Thu, Apr 03, 2014 @ 10:30 AM - 12:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Dr. Yanjing Li, Research Scientist, Intel Labs
Talk Title: Robust System Design
Abstract: Malfunctions in electronic systems can have major consequences ranging from loss of data and services, to financial
and productivity losses, or even loss of human life. Such impacts continue to increase as systems become more
complex, interconnected, and pervasive. Hardware failures are especially a growing concern because:
1. Existing test and validation methods barely cope with today’s complexity. New techniques will be essential to
minimize the effects of defects and design flaws.
2. For coming generations of silicon technologies, several failure mechanisms that were largely benign in the
past are now becoming visible at the system level. A large class of future systems will require tolerance of hardware
errors during their operation.
Robust system design is required to ensure that future electronic systems, from supercomputers all the way to
embedded systems, perform correctly despite rising levels of complexity and disturbances. Traditional fault‐tolerant
computing techniques are generally very expensive, and often inadequate, for this purpose. I will present two
techniques that are essential for robust system design:
1. A new online self‐test and diagnostics technique, called CASP, which enables a system to test itself thoroughly
during normal operation to quickly detect and localize hardware failures. CASP is very thorough with respect to a
wide variety of test coverage metrics (96‐99.5%) while incurring only 1% area and power costs, and 3% performance
cost. In contrast, existing techniques suffer from low coverage (e.g., 70%), high area costs (e.g., 20%), or significant
performance penalties (e.g., 30%) including possible system unresponsiveness.
2. A new self‐repair technique to keep the system functioning correctly even in the presence of hardware failures.
Unlike naïve redundancy with very high (20%) area costs, this technique enables thorough self‐repair with only 7.5%
area impact, 3% power impact, and 0‐5% performance impact.
A key aspect of the approach to these techniques is the orchestration across multiple abstraction layers: physical
design, architecture, and system software. I will demonstrate the effectiveness and practicality of these techniques
using results from the industrial OpenSPARC T2 multi‐core design and the Intel Core i7 hardware platform. I will also
share recent experiences in implementing these techniques in the latest Intel designs.
Biography: Yanjing Li is a research scientist at Intel Labs and a visiting scholar at Stanford University. She received her Ph.D. in
Electrical Engineering from Stanford University. Her research interests include robust system design, energy‐efficient
systems, system validation and test, computer architecture, and system software. Dr. Li received the European Design
and Automation Association Outstanding Dissertation Award, the IEEE International Test Conference Best Student
Paper Award, and the IEEE VLSI Test Symposium Best Paper Award for novel research on robust system design, and
two Intel Divisional Recognition Awards for mobile processor designs that are being adopted by product groups at
Intel.
Host: Professor Murali Annavaram
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Janice Thompson
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
EE-EP Seminar - Sam Emaminejad
Thu, Apr 03, 2014 @ 02:00 PM - 03:30 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Sam Emaminejad, Stanford University
Talk Title: Detection and Actuation at Micro- and Nanoscales: Emerging Biomarker Sensors for Personalized Medicine
Abstract: Personalized medicine is transforming the field of clinical diagnosis. Unlike traditional diagnostic methods that have been reactive and dependent on patient’s apparent symptoms, personalized medicine relies on biomarkers to provide predictive and preemptive care with customized and more effective drug and therapy selection. Informative biomarkers include genes, proteins, and cells whose abundance in human samples are indicative of patient health. Detection of such micro- and nanoscale biomarkers requires biosensors that are equipped with actuation and sensing capabilities at length scales comparable to the size of these bioparticles. To this end, we exploit advanced micro- and nanofabrication techniques and combine high throughput microfluidic and electronic technologies to develop low-cost integrated biosensors geared toward point-of-care diagnostic applications.
In this talk, I will discuss parameters such as multiplexing, sensitivity, and specificity that govern the performance of biosensors. In relation to these parameters, I will present three platforms in which we have demonstrated actuation and sensing of bioparticles on both the micro- and nanoscales, using novel electronic solutions that enable point-of-care diagnosis. The first platform is a multiplexed protein detection system that is realized through enhancing dielectrophoresis force by two orders of magnitude to overcome protein-protein interactions. Next, we will demonstrate a novel contactless impedance sensing scheme to perform low-cost cytometry in whole blood. In the third platform, we will present a sample preparation system for delivery of proteins, with controlled orientation, purified from a complex biological sample to the surface of a quantum tunneling-based biosensor. I will conclude my talk with a discussion of future research directions which prelude my long term vision of developing wearable diagnostic devices for real-time biomarker monitoring.
Biography: Sam Emaminejad received his BASc (2009) and MS (2011) degrees in Electrical Engineering from the University of Waterloo and Stanford University, respectively. He is currently pursuing his PhD in Electrical Engineering at Stanford University, where he is working toward his thesis at the Stanford Genome Technology Center and Stanford School of Medicine. His research is focused on exploiting micro- and nanotechnologies to develop low-cost and integrated biosensing and bioeletronics platforms for personalized medicine applications. Sam has previously worked as an ASIC and Analog Designer in semiconductor companies such as STMicroelectronics and Analog Devices. Sam was awarded Natural Sciences and Engineering Research Council (NSERC) scholarship and was the recipient of Best Paper Award at the IEEE Sensors conference in 2013.
Host: EE-Electrophysics
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 132
Audiences: Everyone Is Invited
Contact: Marilyn Poplawski
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Manifold Constrained Acoustic Modeling for Automatic Speech Recognition
Fri, Apr 04, 2014 @ 10:00 AM - 11:00 AM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Richard Rose, McGill University
Talk Title: Manifold Constrained Acoustic Modeling for Automatic Speech Recognition
Abstract: This presentation investigates the application of manifold learning approaches to automatic speech recognition (ASR). All of the approaches considered rely on very high dimensional feature representations for speech while at the same time assuming that speech features are constrained to lie on a low dimensional embedded manifold. Discriminative manifold based linear projections are investigated as dimensionality reducing feature space transformations. These techniques attempt to preserve local within-class relationships along a nonlinear manifold while maximizing separability between classes. The ASR word error rates obtained from these techniques are compared to those obtained using more well known discriminative dimensionality reducing linear transformations on multiple speech in noise tasks. The high computational complexity associated with computing the Laplacian matrices for these techniques is reduced by an order of magnitude through the use of locality sensitive hashing (LSH) algorithms. As time permits, a discussion of additional applications of manifold based constraints to speech processing will be presented. These include manifold based constraints for regularizing training for speaker adaptation transformations, regularized least squares classifiers for spoken term detection, and manifold regularization for training deep neural networks.
Biography: Richard Rose is an Associate Professor and Graduate Program Director of Electrical and Computer Engineering at McGill University in Montreal, Quebec, Canada. His major area of research is in speech and language processing. His recent research contributions have been in acoustic modeling for speech recognition, computer aided human language translation, and computer aided speech therapy. Over his career, he has published over 130 articles in refereed international journals and conference proceedings. He has served as Adjunct Research Scientist at the Human Language Technology Center of Excellence in Baltimore and as Adjunct Professor of ECE at Johns Hopkins University. Prof. Rose is an IEEE Fellow. Before coming to McGill in 2004, Prof. Rose was a senior member of technical staff at AT&T Labs Research where he contributed to AT&T's speech enabled services and was inventor or co-inventor on twelve patents. His professional service has included General Chair of the IEEE Automatic Speech Recognition and Understanding Workshop, membership in the IEEE Speech Technical Committee, elected membership on the IEEE Signal Processing Society Board of Governors, associate editor of the IEEE Transactions on Speech and Audio Processing, associate editor of the IEEE Transactions on Audio, Speech, and Language Processing, and founding editor of the IEEE Speech Technical Committee Newsletter. Prof. Rose is a member of Tau Beta Pi, Eta Kappa Nu,
and Phi Kappa Phi.
Host: Prof. Shrikanth Narayanan & Alexandros Potamianos
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 132
Audiences: Everyone Is Invited
Contact: Talyia Veal
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Integrated Systems Seminar Series - Spring 2014
Fri, Apr 04, 2014 @ 03:30 PM - 05:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Mircea Stan, University of Virginia
Talk Title: Breaking 3D Power Delivery Walls Using Voltage Stacking
Series: Integrated Systems Seminar Series
Abstract: The power delivery walls include: power density (power consumption density increases beyond the heat dissipation capabilities of the technology), power and ground power delivery pins (chip power consumption requires increasing numbers of pins), 3DIC power density (physical stacking in the third dimension exacerbates the two dimensional explosion), on chip power regulation efficiency (relatively poor efficiencies achievable with on chip regulators limit the effectiveness of many low power schemes). In this talk we demonstrate how voltage stacking is a comprehensive method for addressing the power delivery walls above, with special emphasis on 3DIC.
Biography: Mircea R. Stan received the Ph.D. and M.S. degrees in Electrical and Computer Engineering from the University of Massachusetts at Amherst and the Diploma in Electronics and Communications from "Politechnica" University in Bucharest, Romania. Since 1996 he has been with the Department of Electrical and Computer Engineering at the University of Virginia, where he is now a professor. Prof. Stan is teaching and doing research in the areas of high performance, low power VLSI, temperature aware
circuits and architecture, embedded systems, and nanoelectronics. He has more than 8 years of industrial experience and 16 years of academic experience, has been a visiting faculty at UC Berkeley in 2004-2005, at IBM in 2000, and at Intel in 2002 and 1999. He has received the NSF CAREER award in 1997 and was a coauthor on best paper awards at ISQED 2008, GLSVLSI 2006, ISCA 2003 and SHAMAN
2002. He was the chair of the VLSI Systems and Applications Technical Committee (VSATC) of IEEE CAS in 2005-2007, general chair for ISLPED 2006 and GLSVLSI 2004, TPC chair for NanoNets 2007 and ISLPED 2005 and a Distinguished Lecturer for IEEE SSCS in 2007-2008, and for IEEE CAS in 2004-2005.
Host: Hossien Hashemi, Mike Chen, Mahta Moghaddam, Sushil Subramanian
More Info: http://mhi.usc.edu/activities/integrated-systems/
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Sushil Subramanian
Event Link: http://mhi.usc.edu/activities/integrated-systems/
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Examples of Visual Computing Research at Disney Research Zurich
Wed, Apr 09, 2014 @ 03:30 PM - 04:30 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Dr. Aljoà ¡a SmoliÃâ¡ , Disney Research, Zurich
Talk Title: Examples of Visual Computing Research at Disney Research Zurich
Abstract: Abstract: Disney Research Zurich is a research lab of The Walt Disney Company closely associated with the Computer Graphics Lab of ETH Zurich. It performs applied research on highest scientific level. Visual computing is one of the key research areas in this context, which will be highlighted in this talk by example projects from the past 5 years. Stereoscopic 3D and beyond was traditionally a strong focus from capture to display, including projects on computational stereo camera systems, disparity mapping, 2D-to-3D conversion, image domain warping, warp coding, and stereo-to-multiview conversion. Then approaches for video volume processing for optical flow, disparity estimation, video colorization, or in general, spatio-temporal data diffusion in video will be presented. And extension of these concepts will be spatio-temporal video compositing on video volumes. Finally, an approach for automated image aesthetics will close the talk.
Biography: Dr. Aljoà ¡a SmoliÃâ¡ joined Disney Research Zurich, Switzerland in 2009, as Senior Research Scientist and Head of the ââ¬ÅAdvanced Video Technologyââ¬Â group. Before he was Scientific Project Manager at the Fraunhofer Institute for Telecommunications, Heinrich-Hertz-Institut (HHI), Berlin, also heading a research group. He has been involved in several national and international research projects, where he conducted research in various fields of video processing and visual computing, and published more than 100 referred papers in these fields. He received the Dipl.-Ing. Degree in Electrical Engineering from the Technical University of Berlin, Germany in 1996, and the Dr.-Ing. Degree in Electrical Engineering and Information Technology from Aachen University of Technology (RWTH), Germany, in 2001. Dr. Smolic received the ââ¬ÅRudolf-Urtlel-Awardââ¬Â of the German Society for Technology in TV and Cinema (FKTG) for his dissertation in 2002. He is Area Editor for Signal Processing: Image Communication and served as Guest Editor for the Proceedings of the IEEE, IEEE Transactions on CSVT, IEEE Signal Processing Magazine, and other scientific journals. He chaired the MPEG ad hoc group on 3DAV pioneering standards for 3D video. In this context he also served as one of the Editors of the Multi-view Video Coding (MVC) standard. Since many years he is teaching full lecture courses on Multimedia Communications and other topics, now at ETH Zurich
Host: Prof. Antonio Ortega
Location: Hughes Aircraft Electrical Engineering Center (EEB) - EEB 248
Audiences: Everyone Is Invited
Contact: Talyia Veal
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Sensor Networks for Sustainable Infrastructures
Thu, Apr 10, 2014 @ 10:00 AM - 11:00 AM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Anna Scaglione, UC Davis
Talk Title: Sensor Networks for Sustainable Infrastructures
Abstract: Infrastructures for energy, transportation, water are serving a growing population, increasingly clustering around urban centers. Information systems made for utilizing more efficiently these infrastructure are crucial to allow a more sustainable future. The challenge is moving from legacy systems and operations that are robust, but slow and inflexible, to systems that are controlled based on real time data analytics which allow to maximize the social benefit earned from their usage. Communication, computation and database storage needs will grow and it is essential to engineer these systems to scale, be secure and resilient. This talk considers models for information sharing, computation and scheduling tasks that can support this vision of pervasive information and intelligent automation. We will discuss progress made on basic decentralizing inference primitives via mull-agent learning algorithms for state estimation and subspace tracking, that can be used to build the distributed intelligence needed for monitoring these infrastructure in a resilient and scalable fashion. We will then discuss how to control anonymously large populations of appliances, to have flexible electricity consumption with scalable information and computation models.
Biography: Anna Scaglione is a Professor in the Electrical and Computer Engineering Department at UC Davis, and held Associate and Assistant Professor positions before at Cornell University (2001-2008) and at the University of New Mexico (2000-2001). She is a Fellow of the IEEE, and co-recipient of the 2000 IEEE Signal Processing Transactions Best Paper Award, Ellersick Best Paper Award (MILCOM 2005), the 2013 IEEE Donald G. Fink Prize Paper Award and the 2013 IEEE Signal Processing Society Young Author best paper award, with her student. She held several editorial and technical chair positions, including that of Editor in Chief of the IEEE Signal Processing Letters from 2012-2013. She is currently in the Board of Governor of the Signal Processing Society. Her expertise is in the broad area of signal processing for communication systems, networks and, more recently, power systems. Her current research focuses on studying and enabling decentralized learning and signal processing in networks of sensors and on sensor systems and networking models for demand side management and sustainable energy delivery.
Host: Urbashi Mitra, ubli@usc.edu, EEB 540, x04667
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 132
Audiences: Everyone Is Invited
Contact: Gerrielyn Ramos
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
All Programmable SOC FPGA for Networking and Computing in Big Data Infrastructure
Thu, Apr 10, 2014 @ 03:00 PM - 04:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Dr. Ivo Bolsens, Xilinx
Talk Title: All Programmable SOC FPGA for Networking and Computing in Big Data Infrastructure
Abstract: Today's FPGAs have become 'All Programmable SOC Platforms' that integrate in one single device multi-core CPU's, programmable DSP functions, programmable IO and programmable logic, all immersed in a rich and configurable interconnect network. These programmable platform FPGA's allow for the implementation of heterogeneous multi-core architectures that combine traditional CPU's with application-specific processing cores and dedicated data transfer and storage functions. This is enabled by tools that guide designers during the partitioning and mapping of high-level specifications onto a combination of software running on embedded processors and hardware implemented in programmable logic. FPGAs are well placed to continue to benefit from Moore's law. Advances in process scaling will be augmented with new circuit and architectural improvements along with innovations in system-in-package technology to solve IO challenges and integrate heterogeneous technologies. These innovations will allow designers to build higher performance and lower power systems that optimally exploit the programmable FGPA architecture. As FPGA platforms continue to deliver more performance at lower cost and lower power, they are becoming the heart of embedded applications such as complex packet processing for networks with line rates of 400+ Gbps; high performance digital signal processing in novel wireless baseband and radio functions; and high flexibility to enable programmable networking and data storage functions in cloud infrastructure.
Biography: Ivo Bolsens is senior vice president and chief technology officer (CTO), with responsibility for advanced technology development, Xilinx research laboratories (XRL) and Xilinx university program (XUP). Bolsens came to Xilinx in June 2001 from the Belgium-based research center IMEC, where he was vice president of information and communication systems. His research included the development of knowledge-based verification for VLSI circuits, design of digital signal processing applications, and wireless communication terminals. He also headed the research on design technology for high-level synthesis of DSP hardware, HW/SW co-design and system-on-chip design. Bolsens holds a PhD in applied science and an MSEE from the Catholic University of Leuven in Belgium.
Host: Prof. Viktor Prasanna
More Info: https://bluejeans.com/710795997/browser
Webcast: https://bluejeans.com/710795997/browserLocation: Hughes Aircraft Electrical Engineering Center (EEB) - 132
WebCast Link: https://bluejeans.com/710795997/browser
Audiences: Everyone Is Invited
Contact: Annie Yu
Event Link: https://bluejeans.com/710795997/browser
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Integrated Systems Seminar Series - Spring 2014
Fri, Apr 11, 2014 @ 03:03 PM - 05:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Jose Silva-Martinez, Texas A&M University
Talk Title: Recent Advances and Challenges on High Performance Analog-to-Digital Converters
Series: Integrated Systems Seminar Series
Abstract: Recent developments in mobile computing and wireless internet have led to exponential growth in demand for portable computers and smart phones equipped with WLAN operating at different standards. The digital computing required by these gadgets is facilitated by process scaling that follows Moore’s law and is expected to continue down to 10nm physical gate lengths. Applications such as TV receivers require broadband operation (>800MHz) with over 12 bits resolution; the pipeline architecture is the most popular one, but recently SAR topology is emerging as more power efficient solution. On the other hand, various wireless standards have been developed over the last years due to the high demand for faster data rate in portable wireless communications, which has pushed baseband bandwidths up to a few tens of MHz while requiring minimum power consumption. When high-resolution continuous-time lowpass Σ∆ ADC architectures are selected for emerging products because of their efficiency, a wide bandwidth is essential in multi-standard applications to accommodate receiver bandwidth requirements.
In this lecture, the fundamentals of pipeline will be revised and limitations due to unavoidable mismatches and clock jitter are analyzed. Recent advances in achieving high-resolution, >800 MHz bandwidth and low power will be discussed. It will be shown that one of the remaining bottle necks is the lack of an efficient calibration for applications that require ENOB>10bits. An efficient full digital background calibration scheme that requires minimal digital resources will be discussed in this seminar. Limitations in ΔΣ modulators due to clock jitter and the presence of strong blockers will be quantified; technology trends will be highlighted. Significant research efforts have been devoted to find efficient solutions for the remaining issues: better linearity, wider bandwidth, robustness to clock jitter and co-existence with other standards. In particular, the feedback DAC nonlinearity significantly affects the ADC performance because it directly adds error to the filter input signal and it is not noise-shaped. The foundations on ΔΣ modulators will be covered first and then we will elaborate on linearity limitations as well as jitter and blocker tolerance issues. Two case studies experimentally verified are presented to illustrate design issues and to give insights into the possibilities that exist for solving these contemporary challenges with analog hardware and software-based processing techniques.
Biography: Jose Silva-Martinez got his PhD degree from the Katholieke Universiteit Leuven, Belgium in 1992. He currently holds the rank of Texas Instruments Professor in Analog Engineering at the Department of ECE, Texas A&M University. Dr. Silva-Martinez is an IEEE-Fellow, member of the 2013-2014 CASS Distinguish Lecture Program and 2014-2015 Editor-in-Chief of IEEE TCAS-II. His record of publications show over 105 journals and 160 conferences, 2 books and 12 book chapters and 1 patent. He is co-author of the papers that received the 2011 Best Student Paper Award, IEEE MWCAS, the 2003 Best Student Paper Award, IEEE RF-IC, and recipient of the 1990 Best Paper Award, European Solid-State Circuits Conference (ESSCIRC). He got the 2005 Outstanding Professor Award by the ECE Department, Texas A&M University, 2005; co-advised in Testing techniques the student who was Winner of the 2005 Best Doctoral Thesis Award, presented by the IEEE Test Technology Technical Council (TTTC), IEEE Computer Society.
Host: Hossien Hashemi, Mike Chen, Mahta Moghaddam, Sushil Subramanian
More Info: http://mhi.usc.edu/activities/integrated-systems/
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Sushil Subramanian
Event Link: http://mhi.usc.edu/activities/integrated-systems/
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
EE-Systems Seminar
Thu, Apr 17, 2014 @ 10:30 AM - 12:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Wonsun Ahn , Postdoctoral Research Scientist, University of Illinois at Urbana-Champaign
Talk Title: High-Performance JIT-Compiled Frameworks: Hardware/Compiler Co-Optimization
Abstract: JIT-compiled frameworks are gaining increasing use for their cross-platform portability, performance portability, and runtime adaptability. In particular, scripting languages such as JavaScript, Python, and R are gaining wide acceptance. In these emerging frameworks, there is great opportunity for performance improvement through hardware/compiler co-optimization. In this talk, I present a few novel techniques that I have developed to improve performance.
First, I show how the compiler can use Hardware Transactional Memory (HTM) support to enforce high-performance Sequential Consistency (SC) for programmability and security. The idea is to wrap large sections of code inside a transaction, and then optimize the code inside each transaction without concern for memory-consistency-model restrictions. The optimizations speculate that any violation of the memory model will not be seen by other threads; otherwise, the transaction is aborted. Using this approach, the compiler can even outperform current compilers by a significant margin by allowing optimization across synchronization boundaries.
Next, I also show how the compiler can use the same HTM support to perform alias speculation. The approach consists of performing optimizations assuming the alias relationships that are true most of the time, and using the hardware to detect when such relationships are found not to hold through runtime checks. If the assumptions are correct, the code experiences good speedups; otherwise, the transaction is aborted.
Lastly, I show a compiler enhancement for JavaScript. A key feature of scripting languages that gives them their flexibility is dynamic typing. However, the absence of declared types makes it very challenging for the compiler to generate efficient code. Advanced compilers cope with it by introducing type systems of their own behind the scenes, and maintaining the type of each object at runtime as metadata. In this work, I focus on the Google Chrome V8 JavaScript compiler, and show that its type system is too brittle. While it works well for applications that display static behavior, it causes type specialization to fail in real website code. I go on to modify V8's type system to match the more dynamic behavior of real websites, and show significant savings in execution time, energy, and memory consumption.
Overall, these three approaches allow JIT compilers to achieve high performance while still maintaining programmability and security.
Biography: Wonsun Ahn is a Postdoctoral Research Scientist at the University of Illinois at Urbana-Champaign. His research interests are parallel computer architecture and compilation systems. He is currently the co-PI of an NSF grant on improving the performance of scripting languages. He received a PhD in Computer Science from the same university in 2012. His PhD work was recognized by an IEEE Micro's Top Picks award publication. He has (co-)authored 12 journal and conference papers that have appeared in top compiler and architecture venues, and has two industry patents. He has served in the program and organizational committees of conferences, and is a member of the Samsung Frontier Membership.
Host: Michel Dubois
More Information: print_Ahn.pdf
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Estela Lopez
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Andrew J. Viterbi Distinguished Lecture in Communication
Thu, Apr 17, 2014 @ 04:00 PM - 05:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Professor Abbas El Gamal, Stanford University
Talk Title: Common Information
Series: Distinguished Lecturer Series
Abstract: Entropy, introduced by Shannon in 1948, arises naturally as a universal measure of information in single-source compression, randomness extraction, and random number generation. In distributed systems, such as communication networks, multiprocessors, distributed storage, and sensor networks, there are multiple correlated sources to be processed jointly. The information that is common between these sources can be utilized, for example, to reduce the amount of communication needed for compression, computing, simulation, and secret key generation. My talk will focus on the question of how such common information should be measured.
While our understanding of common information is far from complete, I will aim to demonstrate the richness of this question through the lens of network information theory. I will show that, depending on the distributed information processing task considered, there can be several well-motivated measures of common information. Along the way, I will present some of the key models, ideas, and tools of information theory, which invite further investigation into this intriguing subject.
Some parts of this talk are based on recent joint work with Gowtham Kumar and Cheuk Ting Li and on discussions with Young-Han Kim.
Biography: Abbas El Gamal is the Hitachi America Professor in the School of Engineering and Chair of the Department of Electrical Engineering at Stanford University. He received his Ph.D. degree in electrical engineering from Stanford University in 1978. He was an Assistant Professor in the Department of Electrical Engineering at the University of Southern California (USC) from 1978 to 1980. His research interests and contributions have spanned the areas of information theory, wireless networks, CMOS imaging sensors and systems, and integrated circuit design and design automation. He has authored or coauthored over 200 papers and 30 patents in these areas. He is coauthor of the book Network Information Theory (Cambridge Press 2011). He has won several honors and awards, including the 2012 Claude E. Shannon Award, and the 2004 Infocom best paper award. He is a member of the National Academy of Engineering and a Fellow of the IEEE. He has been active in several IEEE societies, including serving on the Board on Governors of the IT society where he is currently its President. He cofounded and/or served in various leadership roles at several semiconductor, EDA, and biotechnology companies.
Host: Professor Sandeep Gupta
Location: Seeley Wintersmith Mudd Memorial Hall (of Philosophy) (MHP) - 101
Audiences: Everyone Is Invited
Contact: Mayumi Thrasher
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
EE Seminar
Fri, Apr 18, 2014 @ 10:30 AM - 12:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Yuan Xie, Professor, Computer Science and Engineering, Pennsylvania State University
Talk Title: Three-dimensional Integrated Circuits (3D ICs) Design, Architecture, and Applications
Abstract: 3D Integration emerges as an attractive option to sustain Moore's law as well as to enable More-than-Moore. This talk will present an overview of recent research progress in 3D IC designs, including both design tools/VLSI perspective and architecture perspective. It will describe the following research directions for future 3D IC design: Design automation and test techniques and methodologies for 3D designs are imperative to realize 3D integration; Novel architectures and design space exploration at the architectural level are also essential to leverage 3D integration technologies for performance gain; Possible "killer" application for 3D integration (e.g., what application could dramatically benefit from 3D stacking technology or what novel applications are enabled by 3D technology.)
Biography: Yuan Xie is currently a Professor in the Computer Science and Engineering department at the Pennsylvania State University. He received Ph.D. from Princeton University, and was with IBM Microelectronic before joining Penn State. He also helped establish and lead AMD Research China Lab. Prof. Xie is a recipient of the National Science Foundation Early Faculty (CAREER) award, the SRC Inventor Recognition Award, IBM Faculty Award, and several Best Paper Award and Best Paper Award Nominations at IEEE/ACM conferences. His research covers areas of EDA, computer architecture, VLSI circuit designs, and embedded systems. His current research projects include: three-dimensional integrated circuits (3D ICs); emerging memory technologies; low power and thermal-aware design; reliable circuits and architectures; and embedded system synthesis.
Host: Murali Annavaram
More Information: Yuan Xie 04182014.pdf
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Estela Lopez
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Integrated Systems Seminar Series - Spring 2014
Fri, Apr 18, 2014 @ 03:30 PM - 05:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Matthew Reynolds, University of Washington
Talk Title: Wireless Beyond Wi-Fi
Series: Integrated Systems Seminar Series
Abstract: Wireless communication has already enabled the phenomenal growth of mobile computing. But what other impacts can Maxwell's four humble equations have on the world of computing? In this talk I will show some examples of how advances in the wireless world can change the way we think about computing through innovations in energy, communication, sensing, and imaging.
One example is a tiny wireless backpack that enables neural and EMG telemetry from dragonflies in flight, with a 5 Mbps uplink, 1.2mW total power, and a weight of only 38 mg. The backpack is wirelessly powered and employs a modulated backscatter communication link that achieves an energy cost of only a few pJ/bit, over 100X lower power per bit than Wi-Fi. I will then present results that extend MIMO techniques from communication to wireless power transmission, to enhance long range wireless power delivery to mobile devices, and some results, recently reported in Science, on lensless compressive imaging at millimeter wavelengths.
Biography: Matt Reynolds is an Associate Professor in the Departments of Electrical Engineering and Computer Science and Engineering at the University of Washington. He was previously the Nortel Networks Assistant Professor in the Department of Electrical and Computer Engineering at Duke University. He is also co-founder of the RFID systems firm ThingMagic Inc (acquired by Trimble Navigation), the energy conservation firm Zensi (acquired by Belkin), and the home sensing company SNUPI Inc.
Matt's research interests include RFID, energy efficiency at the physical layer of wireless communication, and the physics of sensing and actuation. Matt received the Ph.D. from the MIT Media Lab in 2003, where he was a Motorola Fellow, as well as S.B. and M.Eng. degrees in Electrical Engineering and Computer Science from MIT. He is a Senior Member of the IEEE, has received five Best Paper awards, and has 13 issued and over 30 pending patents.
Host: Hossien Hashemi, Mike Chen, Mahta Moghaddam, Sushil Subramanian
More Info: http://mhi.usc.edu/activities/integrated-systems/
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Sushil Subramanian
Event Link: http://mhi.usc.edu/activities/integrated-systems/
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
New Solutions for High-Level Synthesis
Mon, Apr 21, 2014 @ 10:30 AM - 12:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Deming Chen, University of Illinois at Urbana-Champaign
Talk Title: New Solutions for High-Level Synthesis
Abstract: While technology scaling has presented many new and exciting opportunities, new design challenges have arisen due to increased density and stringent delay and power constraints for VLSI circuits. A significant problem is the growing gap between rapidly increasing silicon capacity and the design productivity that lags behind. High-level synthesis (HLS) has been touted as a solution to this problem, as it can significantly reduce the number of man hours required for a design by raising the level of design abstraction. However, existing HLS solutions have several limitations, and studies show that the design quality of HLS can be noticeably worse than that of manual RTL design. In this talk, I will present several new techniques we developed to drastically improve HLS solutions. These include design entry with parallel languages, smart design space exploration, logic/high-level co-optimization, automatic iterative improvement, and communication optimization across multiple modules, etc. Meanwhile, powerful source-to-source compilation and polyhedral model-based code analysis and transformation are used to enable effective realization of some of these techniques. For example, our code transformation and optimization using polyhedral model can enable data streaming across two communicating hardware modules through HLS, which achieved 30X execution speedup over the baseline on average. At the end of the talk, I will also briefly introduce other on-going research activities in my lab in the areas of GPU computing, nanotechnology, and computational genomics.
Biography: Deming Chen is an Associate Professor of Electrical and Computer Engineering of University of Illinois at Urbana-Champaign. He received his Ph.D. in Computer Science from University of California at Los Angeles in 2005. His research interests include system- and high-level synthesis, compilation and programming for heterogeneous platforms, nano-systems design, GPU optimization, and bioinformatics. He is a technical committee member for a series of conferences, including FPGA, ASPDAC, ICCD, ISQED, DAC, ICCAD, DATE, ISLPED, FPL, etc. He is or has been an associated editor for TCAD, TVLSI, TODAES, TCAS-I, JCSC, and JOLPE. He is the program chair and general chair for several conferences. He received five Best Paper Awards, the NSF CAREER Award in 2008, the ACM SIGDA Outstanding New Faculty Award in 2010, and IBM Faculty Award in 2014. He is a senior member of IEEE. He was involved in two startup companies. He implemented his published algorithm on CPLD technology mapping when he was a software engineer in Aplus Design Technologies, Inc. in 2001, and the software was exclusively licensed by Altera. He is one of the inventors of the xPilot high-level synthesis package developed at UCLA, which was licensed to AutoESL Design Technologies, Inc.
Host: Massoud Pedram
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Annie Yu
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
A Computational Framework for Diversity in Ensembles of Humans and Machine Systems
Mon, Apr 21, 2014 @ 03:00 PM - 05:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Kartik Audhkhasi, University of Southern California
Talk Title: A Computational Framework for Diversity in Ensembles of Humans and Machine Systems
Abstract: My Ph.D. thesis presents a computational framework for diversity in ensembles or collections of humans and machine systems used for signal and information processing. Machine system ensembles have out-performed single systems across many pattern recognition tasks ranging from automatic speech recognition to online recommendation. Likewise, ensembles are central to computing with humans, for example, in crowd sourcing-based data tagging and annotation in human behavioral signal processing. This widespread use of ensembles, albeit largely heuristic, is motivated by their robustness to the ambiguity in production, representation, and processing of real-world information. Diversity or complementarity of the individual humans and machine systems is widely-accepted as a key ingredient in ensemble design. I will present a computational framework for this diversity by addressing three important problems - modeling, analysis, and design.
I will first propose the Globally-Variant Locally-Constant (GVLC) model for the labeling behavior of a diverse ensemble. The GVLC model captures the data-dependent reliability and diverse behavior of an ensemble through a latent state-dependent noisy channel. I will next present the Generalized Ambiguity Decomposition (GAD) theorem that defines ensemble diversity for a broad class of statistical learning loss functions and relates this diversity to ensemble performance. I will show an application of the GAD theorem by theoretically and empirically linking the diversity of an automatic speech recognition system ensemble with the word error rate of the fused hypothesis. The final part of my thesis will present techniques to design a diverse ensemble of machine systems, ranging from maximum entropy models to sequence classifiers. I will also prove that introducing diversity in the training data through careful noise addition speeds-up the maximum likelihood training of Restricted Boltzmann Machines and feed-forward neural networks.
Biography: Kartik Audhkhasi received the B.Tech. degree in Electrical Engineering and the M.Tech. degree in Information and Communication Technology from the Indian Institute of Technology, Delhi. He is currently an Electrical Engineering Ph.D. candidate at the University of Southern California (USC), Los Angeles. His research focuses on a computational framework for diversity in ensembles of humans and machine systems for signal and information processing. He is broadly interested in statistical signal processing, speech processing and recognition, machine learning, and human-centered computing.
He is a recipient of the Annenberg fellowship, the IBM Ph.D. fellowship, and was a 2012 USC Ming Hsieh Institute Ph.D. Scholar. Kartik was part of the USC team that won the Interspeech-2013 Computational Paralinguistics Challenge. He has also received best paper and best teaching assistant awards from the Electrical Engineering Department at USC.
Host: Prof. Shrikanth S. Narayanan
Location: Ronald Tutor Hall of Engineering (RTH) - 320
Audiences: Everyone Is Invited
Contact: Talyia Veal
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Brain MRI Statistical Feature Extraction for Characterizing Neurodegenerative Diseases
Tue, Apr 22, 2014 @ 03:00 PM - 04:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Norbert Schuff, Ph.D., Dept. of Radiology and Biomedical Imaging, University of California, San Francisco
Talk Title: Brain MRI Statistical Feature Extraction for Characterizing Neurodegenerative Diseases
Series: Medical Imaging Seminar Series
Abstract: Brain lesions from neurodegenerative diseases, such as Alzheimer's disease and Parkinson's disease, are difficult to detect on MRI with the naked eye. This may explain why MRI is not yet used as a diagnostic tool for these conditions - except for ruling out other major brain diseases. It is therefore important to find effective solutions for the extraction of imaging features that can be used for diagnosing neurodegenerative diseases. I will discuss new approaches mainly anchored in information theory for extracting features from structural as well as functional brain MRI data. In particular, I will show new approaches for quantifying complexity of resting-state fMRI. Lastly, I will present initial results from MRI vascular fingerprinting - an approach for studying brain microvasculature.
Biography: I am a Professor in the Department of Radiology and Biomedical Imaging at the University of California, San Francisco. I am also Co-Director of the Neurodegenerative Diseases Research Interest Group and a researcher at the San Francisco Veterans Affairs Medical Center. I earned my PhD in Physics from the Ruprecht Karls University of Heidelberg in 1983. From 1984 to 1992, I developed NMR & MRI systems first with Bruker GmbH in Karlsruhe/Germany and later with Varian, Palo Alto, California. In 1993, I joined UCSF.
I study neurodegenerative diseases such as Alzheimer and Parkinson using MRI. My interest is to better capture abnormal brain structure and function for improving prediction, diagnosis and monitoring progression of these devastating conditions. I accomplish this by developing new methods for extracting image features using MRI physics as well as modern concepts of probability, statistical learning and information theory.
Host: Prof. Justin Haldar
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Talyia Veal
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Programming Bits and Atoms
Thu, Apr 24, 2014 @ 01:30 PM - 02:30 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Neil Gershenfeld, MIT Center for Bits and Atoms
Talk Title: Programming Bits and Atoms
Abstract: Software is digital, but not physical: it is represented by bits of information that are written without physical units. Hardware is physical, but not digital: it can contain information, but its own construction is continuous. I will present research on aligning
the descriptions of software and hardware, and explore its implications for the future of computation and fabrication.
Biography: Prof. Neil Gershenfeld is the Director of MIT's Center for Bits and Atoms. His unique laboratory is breaking down boundaries between the digital and physical worlds, from creating molecular quantum computers to virtuosic musical instruments. Technology from his lab has been seen and used in settings including New York's Museum of Modern Art and rural Indian villages, the White House and the World Economic Forum, inner-city community centers and automobile safety systems, Las Vegas shows and Sami herds. He is the author of numerous technical publications, patents, and books including Fab, When Things Start To Think, The Nature of Mathematical Modeling, and The Physics of Information
Technology, and has been featured in media such as The New York Times, The Economist, NPR, CNN, and PBS. He is a Fellow of the American Physical Society, has been named one of Scientific American's 50 leaders in science and technology, as one of
40 Modern-Day Leonardos by the Museum of Science and Industry, one of Popular Mechanic's 25 Makers, has been selected as a CNN/Time/Fortune Principal Voice, and by Prospect/Foreign Policy as one of the top 100 public intellectuals. Dr. Gershenfeld has
a BA in Physics with High Honors from Swarthmore College, a Ph.D. in Applied Physics from Cornell University, honorary doctorates from Swarthmore College and Strathclyde
University, was a Junior Fellow of the Harvard University Society of Fellows, and a member of the research staff at Bell Labs.
More Information: Gershefeld.jpg.pdf
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 132
Audiences: Everyone Is Invited
Contact: Estela Lopez
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Energy Informatics Seminar
Fri, Apr 25, 2014 @ 03:00 PM - 04:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Krishna Palem, Rice University
Talk Title: Sensoptimized Systems for “Good enough” Computing: Ultra-efficient Cortical Processors through Melding Neuroscience with Inexact Architectures
Series: Energy Informatics Distinguished Seminar Series
Abstract: Increasingly, information systems such as cellphones, iPods and glassesâmore broadly, embedded systemsâare delivering information to be consumed by our senses. Such information, in the form of speech, graphics, or video, is subject to varying levels of processing by our nervous systems, followed by our higher cognitive functions in the brain. Yet, system designs today do not often take advantage of the compensatory processing done neuro-cognitively by our brain. Rather, the current hardware, software, and industrial design methodologies aim to deliver the best possible quality to maximize the user’s experience. The resulting computing platforms are over-engineered and expensiveâin terms of monetary cost, and the amount of energy (or battery) consumed. For several years now, we have been developing a philosophy and a design methodology to counter this trend aimed at the innovation of digital computing systems which, when interacting with our senses, are optimized to be just “good enough” and thus not over-engineered This is achieved by factoring in the compensatory neuro-cognitive processing done by our sensory pathways, and by trading away the accuracy of the system in return for disproportionately high savings or gains. The resulting sensoptimied systems are meant to be significantly more efficient than those designed conventionally. At their core, our sensoptimized systems are realized using inexact integrated circuits (ICs) and computing architectures, sometimes dubbed probabilistic CMOS (PCMOS)âa technology and design methodology which our group has been developing for over a decade. Looking into the future, inexact circuits and sensoptimization could be the basis for realizing families of cortical processors which meld principles of neuroscience with the design of good-enough computing platforms. Here, the opportunities are many and we will conclude the technical portion of our talk with an overview of a sensoptimized cortical processor we are currently developing for supporting computer-vision at the embedded scale.
Biography: Krishna V. Palem is the Ken and Audrey Kennedy Professor at Rice University with appointments in CS, in ECE, and Statistics, and is a scholar in the Baker Institute for Public Policy. He founded and directed the NTU-Rice Institute on Sustainable and Applied Infodynamics. He was a Moore Distinguished Faculty Fellow at Caltech, and a Schonbrunn Fellow at the Hebrew University of Jerusalem, where he was recognized for excellence in teaching. His advisee Suren Talla was awarded the Janet Fabri Prize for outstanding dissertation, and his related work on the foundations of architecture assembly for designing reconfigurable embedded SoC architectures, developed at Proceler Inc. which he co-founded as a CTO, was a nominee for the Analysts choice awards as one of the four outstanding technologies. A decade ago, he pioneered a novel technology dubbed Probabilistic CMOS (PCMOS) which resulted in inexact or approximate computing. PCMOS has been recognized by three best-paper awards, as one of the ten technologies 'likely to change the way we live' by MIT's Technology Review, and as one of the seven 'emerging world changing technologies' by IEEE as part of its 125th anniversary celebrations. He is a Fellow of the AAAS, the ACM and the IEEE. In 2012, Forbes (India) ranked him second on the list of eighteen scientists who are “..some of the finest minds of Indian origin.” He is the recipient of the 2008 W. Wallace McDowell Award, IEEE Computer Society's highest technical award and one of computing's most prestigious individual honors.
Host: Viktor Prasanna
More Info: http://cei.usc.edu/news
Location: Seeley G. Mudd Building (SGM) - 101
Audiences: Everyone Is Invited
Contact: Annie Yu
Event Link: http://cei.usc.edu/news
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor. -
Integrated Systems Seminar Series - Spring 2014
Fri, Apr 25, 2014 @ 03:30 PM - 05:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Waleed Khalil, Ohio State University
Talk Title: Towards the Design of Robust Wide Tuning Range and Low Phase Noise mm-Wave VCOs: Challenges, Solutions and Recent Advances
Series: Integrated Systems Seminar Series
Abstract: Over the past few years, there has a been a growing demand for mm-wave circuits with emerging applications such as Gigabit WLAN and Short Range Radars. More recently, mm-wave technology has been touted for future 5G cellular systems, eclipsing a long era where low GHz systems dominated the field of wireless systems. Moving forward, we expect the mass market adaptation of these technologies to force the shift towards low-cost Si-based processes. However, in to order to succeed in this space, we need to push the Si performance closer to the well-entrenched incumbent III-V technologies. In the VCO domain, major challenges still remain in meeting the tuning range and phase noise specifications while maintaining high yield. In light of these challenges, this seminar will present our current and future research work to build mm-wave VCOs circuits with record benchmarks. Different topologies in both CMOS and SiGe technologies will be covered. Also, a new analytical model that facilitates an efficient optimization of the VCO turning range and phase noise is presented. The model is exploited to analyze the impact of technology scaling on the achievable performance bounds.
Biography: Dr. Khalil received his B.S.E.E. and M.S.E.E degrees from the University of Minnesota in 1992 and 1993, respectively. In 2008, he received his PhD degree in Electrical Engineering from Arizona State University. He is currently serving as an Assistant Professor at the ECE department and the ElectroScience Lab, The Ohio State University. He conducts research in SDRs, digital intensive RF and mm-wave circuits and systems, high performance clocking circuits and GHz A/D and D/A circuits. Prior to joining OSU, Prof. Khalil spent 16 years at Intel Corporation where he held various technical and leadership positions in wireless and wireline communication groups. While at Intel, he was appointed the lead engineer at the advanced wireless communications group, where he played an instrumental role in the development of the industry’s first Analog Front-end IC for third generation radios (3G). He later co-founded a startup group to develop Intel’s first RF front-end IC, as a principle leader of the radio transmitter chain. During his work at Intel, he received the prestigious Intel Quality Award in 2005. Dr. Khalil’s research group has received several paper awards, among them TSMC’s outstanding research award in 2010 and the best paper award in the Wireless Innovation Forum and Phase Array Symposium in 2013. He authored 10 issued and several other pending patents, over 50 journal and conference papers and three books/book chapters. He is a senior member of IEEE and serves in the steering committee for the RFIC Symposium and as a guest faculty at the Air Force Research Laboratory.
Host: Hossien Hashemi, Mike Chen, Mahta Moghaddam, Sushil Subramanian
More Info: http://mhi.usc.edu/activities/integrated-systems/
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Sushil Subramanian
Event Link: http://mhi.usc.edu/activities/integrated-systems/
This event is open to all eligible individuals. USC Viterbi operates all of its activities consistent with the University's Notice of Non-Discrimination. Eligibility is not determined based on race, sex, ethnicity, sexual orientation, or any other prohibited factor.
