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Events for January 30, 2009
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Meet USC
Fri, Jan 30, 2009
Viterbi School of Engineering Undergraduate Admission
Workshops & Infosessions
This half day program is designed for prospective freshmen and family members. Meet USC includes an information session on the University and the Admission process; a student led walking tour of campus and a meeting with us in the Viterbi School. Meet USC is designed to answer all of your questions about USC, the application process and financial aid.Reservations are required for Meet USC. This program occurs twice, once at 9:00 a.m. and again at 12:00 p.m. Please visit http://www.usc.edu/admission/undergraduate/visit/meet_usc.html to check availability and make an appointment. Be sure to list an Engineering major as your "intended major" on the webform!
Location: USC Admission Center
Audiences: Prospective Freshmen and Family Members - RESERVATIONS REQUIRED
Contact: Viterbi Admission
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Active CROW Slow-Light Structures: New Directions and Applications
Fri, Jan 30, 2009 @ 11:00 AM - 12:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Jacob (Koby) Scheuer
School of EE, Tel-Aviv University, IsraelAbstract: In recent years, much attention has been focused on the behavior of light propagation in coupled resonator optical waveguides (CROWs). Substantial decrease of the group velocity can be attained in such chip-size structures, leading to numerous potential applications such as optical delay lines, optical filters wavelength converters and optical rotation sensors. However, the performance of CROW based systems is largely limited by the quality factor (Q) of the resonators composing it. Noticeable slowing of light necessitates small coupling between the micro-resonators, which, in turn, induces high optical losses, making the structure impractical for any real-life application. While the fabrication of high Q structures has been demonstrated, the complexity, high costs and low yields of such methods make them unsuitable for large – scale, commercial endeavors. In this talk, I will present new approach for overcoming the cavity loss problem based on incorporating optical gain in the cavities. New schemes for manipulating optical information by trapping and releasing optical pulses propagating in an array of coupled semiconductor lasers will be presented and analyzed. The incorporation of gain will be also shown to provide an efficient tool for dynamically controlling the propagation of light pulses, paving the road for realizable packet switching, routing and optical memory applications.Biography: Jacob (Koby) Scheuer received Ph.D. degree in electrical engineering from the Technion—Israel Institute of Technology, Haifa, Israel, in 2001. He was a Chief Designer with Lambda Crossing—an optical component startup specializing in microring resonators for two years. Then, he joined the Center for the Physics of Information and the Department of Applied Physics, the California Institute of Technology, Pasadena, as a Research Associate. Currently, he is a Senior Lecturer with the School of Electrical Engineering, Tel-Aviv University, Israel. His research interests include nanophotonics, polymer optics, slow light, and secure communications.Host: Alan Willner, willner@usc.edu, EEB 538, x04664
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 539
Audiences: Everyone Is Invited
Contact: Gerrielyn Ramos
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Integrated Sys Seminar-Traveling Wave Si ICs for High-Speed Comm. (Prof. Jim Buckwalter, UCSD)
Fri, Jan 30, 2009 @ 02:00 PM - 03:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker - Prof. James Buckwalter (UCSD)Abstract:Traveling wave structures are appealing for high-speed (>40Gbs) and high-frequency (>60GHz) communication circuits implemented with highly-scaled CMOS/BiCMOS processes because of the reduced passive area required for broadband matching. Broadband millimeter traveling wave approaches are discussed in this talk and novel schemes for improving the performance of traveling wave structures are presented. First, trade-offs between traveling wave and lumped circuits are described and loss-compensation for equalized frequency response is presented. Second, a 30dB, W-Band cascaded constructive wave amplifier is discussed that sets new records for the achievable gain in a silicon technology. Finally, a 10dB, 102GHz amplifier is presented for broadband circuit applications.
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Hossein Hashemi
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Radiation Effects Challenges in Commercial-Density SRAMS
Fri, Jan 30, 2009 @ 02:00 PM - 03:30 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Abstract: The space electronics industry is at an interesting crossroads. The space electronics demand is not sufficient to continue to justify the costs of building radiation-hardened IC fabrication foundries, which have risen to the multi-billion dollar range for deep-submicron technologies. The main thrust of the Radiation-Hardened-by-Design (RHBD) research area is to use architecture, circuit design, and layout techniques to build chips that are radiation-tolerant by using commodity commercial foundry lines. Under the sponsorship of the DARPA RHBD program, our research group has fabricated two 64Kbit SRAM devices in IBM 90nm technology using such techniques. The test results show that our resulting designs perform well in radiation environments with regard to single-event effects (SEE) with little area and speed penalties. The results also show that increased leakage power induced by high total ionizing dose (TID) is negligible below TID levels of 300 KRads. Bio: Dr. Jeff Draper holds joint appointments at USC as a Research Assistant Professor in the Ming Hsieh Department of Electrical Engineering and Project Leader at Information Sciences Institute. In addition to the RHBD work described above, his group contributed to the architecture and VLSI implementation of the MONARCH chip in IBM 90nm technology, a 100M-gate chip containing 6 RISC processors, 12 MB of embedded DRAM, a polymorphic streaming computing fabric, and several external ports. This combination of elements offers over 64 GFLOPS of computing throughput with 60 GB/s of memory bandwidth. Prior to this work, Dr. Draper's group completed the development of a 56-million transistor processing-in-memory (PIM) chip using TSMC 0.18-micron technology for the DIVA project. Dr. Draper received a BS in Electrical Engineering from Texas A & M University and an MSE and PhD in Computer Engineering from the University of Texas at Austin. He has published over 70 papers on many aspects of computer architecture and VLSI. His research interests are resilient computing, radiation hardening by design, PIM architectures, networks-on-chip, and multi-core architectures.
Location: Ronald Tutor Hall of Engineering (RTH) - 306
Audiences: Everyone Is Invited
Contact: Annie Yu
