Select a calendar:
Filter April Events by Event Type:
SUNMONTUEWEDTHUFRISAT
Events for April 06, 2006
-
Viterbi Early Career Chair Lecture Series
Thu, Apr 06, 2006
Integrated Media Systems Center
Conferences, Lectures, & Seminars
Gérard Assayag - Apr4 Demo (OMax+DennisThurmond),
Apr5 Lecture (ComputerAssistedComposition@IRCAM),
Apr6 Workshop (OpenMusic).* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *Gérard AssayagHead, Music Representations Research GroupInstitut de Recherche et Coordination Acoustique/Musique (IRCAM)Directeur de Recherches associé, Centre National de la Recherche Scientifique (CNRS)More details at: http://www-rcf.usc.edu/~mucoaco/events/200604-assayagPoster: http://www-rcf.usc.edu/~mucoaco/events/200604-assayag/assayag-poster3.pdf* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *TUE, APRIL 4, 12:30PM-1:30PM, MacDonald Recital Hall (formerly MUS106)DEMONSTRATION Improvising with the Computer using OMax, a Statistical Learning EnvironmentFeaturing Dennis Thurmond (+keyboard) & Gérard Assayag (+OMax)OMax, the machine improvization system by Assayag and Chemillier, plays a concert with Dennis Thurmond, director of keyboard pedagogy at the Thornton School. As the digital partner "listens" to, and learns from, the music master, a sort of clone emerges that recombines material extracted from the past, while maintaining stylistic consistency. The performer essentially plays with a distorted self in a "stylistic feed-back" loop.* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *WED, APRIL 5, 2:30PM-4:00PM, GER 309GENERAL LECTUREComputer Assisted Composition at IRCAM: the OpenMusic environmentThis lecture provides a general introduction to computer assisted composition at IRCAM, with a special focus on the OpenMusic (OM) project. OM, a visual programming environment created by Assayag and Agon, was designed at IRCAM to help composers set up programs needed to prepare complex music material structured by rules of their own construction. OM provides the means to describe music processes in a formal, algorithmic, or purely graphical way, allowing composers to model music material both in- and out-of-time, and leading to a renewed concept of a "score" as a dynamic network of interrelated musical components, thus facilitating the generating and testing of new musical ideas. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *THU, APRIL 6, 2:30PM-4:00PM, GER 309WORKSHOPOpenMusic and OMax under the coverThis workshop will provide a practical introduction to OpenMusic (OM). OM may be used as a general purpose functional/object/visual programming language. At a more specialized level, a set of classes and libraries make it a very convenient environment for music composition. Objects are symbolized by icons, and most operations are performed by drag-and-drop. Numerous examples of classes implementing musical data/behaviour will be provided. These classes are associated with graphical editors, and can be readily extended by the user to meet specific needs. High-level in-time organization of the music material is proposed through the maquette concept. The session concludes with a description of OMax, the machine improvisation system built on OM and Max.* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *GERARD ASSAYAG is currently head of the Music Representation Research
Group at IRCAM (Institut de Recherche et de Coordination
Acoustique/Musique) in Paris, and Directeur de Recherches associC) for
the CNRS (Centre National de la Recherche Scientifique). Born in 1960, he studied computer science, music and linguistics. In 1980, while still a student, he won research awards in "Art and the Computer", a national software contest launched in 1980 by the French Ministry of Research, and another one in the "Concours Micro", a contest in computing in the arts using early micro-computers. In the mid-eighties, he wrote the first IRCAM environment for
score-oriented Computer Assisted Composition. In the mid-nineties he
created, with Carlos Agon, the OpenMusic environment which is
currently used by numerous composers and musicologists around the
world, including at universities and institutions such as
Columbia, Harvard, IRCAM, Conservatoire de Paris, Technischen
Universitat Berlin, University of Wisconsin, University of Cincinnati,
and the Sibelius Academy in Finland. Gérard Assayag is currently in charge of ATIAM, an MS/PhD program in Acoustics, Signal Processing, and Computer Science Applied to Music. ATIAM is co-organized by IRCAM , Universite Pierre et Marie Curie, and Telecom Paris. His research interests center on music representation issues, and include computer language paradigms, machine learning, constraint and visual programming, computational musicology, music modeling, and computer-assisted composition. Gérard Assayag is a founding member of the AFIM (Association
Francaise d'Informatique Musicale), and member of the FWO Society on
Foundations of Music Research. He has organized the "Forum Diderot, Mathématique et Musique" for the European Mathematical Society in 1999 (published as a book by Springer Verlag 2001) as well as several
international computer music conferences, including the Sound and
Music Computing 2004 conference, which included a preceding
international workshop/concert on improvisation with the computer.
Recently, he has participated in the founding of The Journal of
Mathematics and Music project, whose affiliates come from institutions
such as IRCAM, Yale University, and the Eastman School of Music. In recent years, Gerard Assayag has carried out research and
developed software in style modeling and computer improvisation. His
recent papers with his co-authors include "Using Factor Oracles for
Machine Improvisation" in Soft Computing, "Using Machine-Learning
Methods for Musical Style Modeling" in IEEE Computer, and "Computer
Assisted Composition at IRCAM : PatchWork & OpenMusic" in the
Computer Music Journal, and "Mathematics and Music, A Diderot
Mathematical Forum" published by Springer-Verlag, Berlin.* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *Organizer: Elaine Chew, Viterbi Early Career, Assistant Professor of Industrial and Systems EngineeringSupported in part by the Viterbi Early Career Chair Funds, the Integrated Media Systems Center, and the Epstein Department of Industrial and Systems Engineering.For other lectures in the series, please see http://www-rcf.usc.edu/~mucoaco/events/vecc0506.html
Location: See event details
Audiences: Everyone Is Invited
Contact: Elaine Chew
-
Apply now for VSC funding Board!
Thu, Apr 06, 2006
Viterbi School of Engineering Student Organizations
Student Activity
Apply now for VSC Funding Board. You can find more information online at:http://viterbi.usc.edu/students/vsc/
Audiences: Undergraduate
Contact: Viterbi Student Council
-
ELECTRICAL ENGINEERING-DISTINGUISHED LECTURER SERIES
Thu, Apr 06, 2006 @ 02:00 PM - 03:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
"Design in the Nano-Meter Regime: From Devices to System Architecture"Prof. Kaushik RoyRoscoe H. George Professor of ECECo-Director, Center for Wireless Systems & ApplicationsPurdue UniversityAbstract:Scaling of technology over the last few decades has produced an exponential growth in computing power of integrated circuits and an unprecedented number of transistors integrated into a single. However, scaling is facing several problems – severe short channel effects, exponential increase in leakage current, increased process parameter variations, and new reliability concerns. Hence, reliable, low-power designs require a shift in design paradigm. We believe that /device aware circuit and architecture design/ along with statistical design techniques can provide large improvement in power dissipation while providing the required reliability and yield. In this talk I will present device aware CMOS design to address power and reliability problems in scaled technologies for different application domains – high-performance with power as constraint and ultra-low power with reasonable performance.Bio:Kaushik Roy received B.Tech. degree in electronics and electrical communications engineering from the Indian Institute of Technology, Kharagpur, India, and Ph.D. degree from the electrical and computer engineering department of the University of Illinois at Urbana-Champaign in 1990. He was with the Semiconductor Process and Design Center of Texas Instruments, Dallas, where he worked on FPGA architecture development and low-power circuit design. He joined the electrical and computer engineering faculty at Purdue University, West Lafayette, IN, in 1993, where he is currently a Professor and holds the Roscoe H. George Professor of Electrical & Computer Engineering. His research interests include VLSI design/CAD for nano-scale Silicon and non-Silicon technologies, low-power electronics for portable computing and wireless communications, VLSI testing and verification, and reconfigurable computing. Dr. Roy has published more than 350 papers in refereed journals and conferences, holds 8 patents, and is co-author of two books on Low Power CMOS VLSI Design (John Wiley & McGraw Hill). Dr. Roy received the National Science Foundation Career Development Award in 1995, IBM faculty partnership award, ATT/Lucent Foundation award, 2005 SRC Technical Excellence Award, SRC Inventors Award, and best paper awards at 1997 International Test Conference, IEEE 2000 International Symposium on Quality of IC Design, 2003 IEEE Latin American Test Workshop, 2003 IEEE Nano, 2004 IEEE International Conference on Computer Design, and 2005 IEEE Circuits and system society Outstanding Young Author Award (Chris Kim). Host: Prof. Massoud Pedram, ext. 04458 http://viterbi.usc.edu/calendar/
Location: Ethel Percy Andrus Gerontology Center (GER) - ontology Auditorium
Audiences: Everyone Is Invited
Contact: Rosine Sarafian
-
COMPUTER ENGINEERING SEMINAR SERIES
Thu, Apr 06, 2006 @ 02:00 PM - 03:20 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
CENG SEMINAR SERIES"Optimized Compiler Generated Code Accelerators For FPGAs "Prof. Walid NajjarComputer Science & EngineeringUniversity of California, RiversideABSTRACT:Using FPGA devices to accelerate codes might have seemed an esoteric idea a few years ago. It is quickly moving into the mainstream not only for embedded but also supercomputer applications. Speedups ranging from 10x to 1000x have commonly been reported. FPGAs are commonly programmed using hardware description languages (HDL). HDLs are behavioral in nature and not easily amenable to high-level compiler transformations. In this paper we describe ROCCC (Riverside Optimizing Configurable Computing Compiler) a C to VHDL compiler that targets the automatic generation of FPGA-based accelerators. ROCCC optimizes and parallelizes the most frequently executed kernel loops in applications such as multimedia and scientific computing. Its objectives are to (1) bridge the performance gap between compiled and hand-written code and (2) apply extensive compile-time transformations on multi-dimensional arrays and non-trivial loop nests. Such transformations would be too complex for a human programmer to handle in a reasonable time. The objectives of the ROCCC optimizations are: (1) Maximize the parallelism in the circuit as well as the clock rate at which it operates. (2) Minimize the number of off-chip memory accesses as well as the area of the circuit. The main challenge that faces HLL to HDL translation is the paradigm shift from the stored program model to a value-based, data-driven execution – from temporal to a spatial execution. The task of an FPGA compiler is to generate both the data path and the sequence of operations (control flow) on that data path. The lack of architectural structure on the FPGA presents a number of opportunities for the compiler: (1) The parallelism is very high and limited only by the size of the FPGA or the bandwidth in or out of it. (2) On-chip storage can be configured at will. (3) Circuit customization allows the compiler to reduce the circuit size as well as the clock duration. We use dynamic programming applications, for DNA and protein string matching, to demonstrate the potentials of ROCCC. A relatively small C code that is mapped to the FPGA available on the Cray XD1 can achieve 1 to 100 Giga cell update per second. This translates to a two to four orders of magnitude speedup compared to a 2 GHz CPU with an ideal cache and no pipeline stalls.BIO:Walid A. Najjar is a Professor in the Department of Computer Science and Engineering at the University of California Riverside. He received a B.E. in Electrical Engineering from the American University of Beirut in 1979 and the M.S. and Ph.D. in Computer Engineering from the University of Southern California in 1985 and 1988 respectively. He was on the faculty of the Department of Computer Science at Colorado State University (1989 to 2000), before that he was with the USC-Information Sciences Institute. His research is in computer architecture, reconfigurable and embedded systems and compiler optimizations and has been supported by NSF, DARPA and various companies. He has served on the program committees for a number of leading conferences in this area including CASES, ISSS-CODES, DATE, HPCA, and MICRO.Host: Prof. Viktor Prasanna, x04483
Location: Olin Hall of Engineering (OHE) - -136
Audiences: Everyone Is Invited
Contact: Rosine Sarafian
-
Distinguished Lecture Series
Thu, Apr 06, 2006 @ 03:00 PM - 04:30 PM
Thomas Lord Department of Computer Science
Conferences, Lectures, & Seminars
"On Building Memex: Current Status"Dr. Gordon BellMicrosoft ResearchAbstractMemex is a quest to chronicle a person's life by encoding every aspect of one's communications with people and machines, what is heard and seen, and all the aspects of their physical existence. These digital memories will not only extend human memory; they will infallibly record sensor readings and machine activities not even perceived by humans. Digital memories can provide humans with better recall, improved health, faster learning, new insights, and a telling of their story to posterity that only the great used to receive. They will hopefully enhance personal reflection in the same way that internet search has enabled more research.Biography:Gordon Bell is a senior researcher in Microsoft's Media Presence Research Group - a part of the Bay Area Research Center (BARC) maintaining an interest in startup ventures. Gordon has long evangelized scalable systems starting with his interest in multiprocessors (mP) beginning in 1965 with the design of Digital's PDP-6, PDP-10's antecedent, one of the first mPs and the first timesharing computer. He continues this interest with various talks about trends in future supercomputing (see Papers… presentations, etc.) and especially clustered systems formed from cost-effective "personal computers". As Digital's VP of R&D he was responsible for the VAX Computing Environment. In 1987, he led the cross-agency group as head of NSF's Computing Directorate that made "the plan" for the National Research and Education Network (NREN) aka the Internet. When joining Microsoft in 1995, Gordon had started focusing on the use of computers and the necessity of telepresence: being there without really being there, then. "There" can be a different place, right now, or a compressed and different time (a presentation or recording of an earlier event). In 1999 this project was extended to include multimedia in the home (visit Papers… presentations, etc.). He is putting all of his atom- and electron-based bits in his local Cyberspace. It is called by MyLifeBits the successor to the Cyber All project. This includes everything he has accumulated, written, photographed, presented, and owns (e.g. CDs). In February 2005 an epiphany occurred with the realization that MyLifeBits goes beyond Vannevar Bush's "memex" and is a personal transaction processing database for everything described in June 14, 2005 SIGMOD Keynote.Refreshments will be served.Host: Leana Golubchik
Location: Henry Salvatori Computer Science Center (SAL) - 101
Audiences: Everyone Is Invited
Contact: Nancy Levien
-
VSC funding application submission deadline
Thu, Apr 06, 2006 @ 03:00 PM
Viterbi School of Engineering Student Organizations
Student Activity
Please turn in all documents requested to get funding from the VSC funding board. For more information, please check
http://viterbi.usc.edu/students/vsc/funding/ or email at vscfb@usc.eduLocation: Ronald Tutor Hall of Engineering (RTH) - 110
Audiences: Undergrad
Contact: Viterbi Student Council Funding Board
