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Events for June 01, 2018

  • Repeating EventMeet USC: Admission Presentation, Campus Tour, and Engineering Talk

    Fri, Jun 01, 2018

    Viterbi School of Engineering Undergraduate Admission

    Workshops & Infosessions


    This half day program is designed for prospective first-year students (High School juniors and younger) and family members. Meet USC includes an information session on the University and the Admission process, a student led walking tour of campus, and a meeting with us in the Viterbi School. During the engineering session we will discuss the curriculum, research opportunities, hands-on projects, entrepreneurial support programs, and other aspects of the engineering school. Meet USC is designed to answer all of your questions about USC, the application process, and financial aid.

    Reservations are required for Meet USC. This program occurs twice, once at 8:30 a.m. and again at 12:30 p.m.

    Please make sure to check availability and register online for the session you wish to attend. Reservations are required for the Meet USC program.

    Also, remember to list an Engineering major as your "intended major" on the webform!

    >> Register for a Meet USC Session

    Location: Ronald Tutor Campus Center (TCC) - USC Admission Center

    Audiences: Prospective Undergrads and Families

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    Contact: Viterbi Admission

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  • Towards Smarter Hardware Prediction Mechanisms

    Towards Smarter Hardware Prediction Mechanisms

    Fri, Jun 01, 2018 @ 10:00 AM - 11:00 AM

    Ming Hsieh Department of Electrical and Computer Engineering

    Conferences, Lectures, & Seminars


    Speaker: Akanksha Jain, University of Texas at Austin

    Talk Title: Towards Smarter Hardware Prediction Mechanisms

    Abstract: In today's data-driven world, memory system performance remains critical to the overall performance of many workloads. In this talk, we present recent work in two aspects of hardware caching: (1) The Hawkeye Cache (ISCA 2016), which introduces a novel method of solving the age-old problem of cache replacement, and (2) Harmony, which uncovers a new design space for cache replacement policies in the presence of prefetching (ISCA 2018). We will then briefly discuss ways that machine learning can help us improve upon these ideas, and we conclude by discussing the broader role machine learning can play in advancing memory system research.

    Biography: Akanksha Jain received her PhD in Computer Science from The University of Texas in December 2016. In 2009, she received the B.Tech and M. Tech degrees in Computer Science and Engineering from the Indian Institute of Technology Madras. Her research interests are in computer architecture, with a particular focus on the memory system and on using machine learning techniques to improve the design of memory system optimizations.

    Host: Xuehai Qian, x04459, xuehai.qian@usc.edu

    Location: Hughes Aircraft Electrical Engineering Center (EEB) - 132

    Audiences: Everyone Is Invited

    Contact: Gerrielyn Ramos

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