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Events for July 19, 2011
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Six Sigma Black BeltTue, Jul 19, 2011
Executive Education
Conferences, Lectures, & Seminars
Abstract: This course teaches you the advanced problem-solving skills you'll need in order to measure a process, analyze the results, develop process improvements and quantify the resulting savings. Project assignments between sessions require you to apply what youâve learned. This course is presented in the classroom in three five-day sessions over a three-month period (July 18-22; August 15-19; and September 12-16, 2011).
Learn the advanced problem-solving skills you need to implement the principles, practices and techniques of Six Sigma to maximize performance and cost reductions in your organization. During this three-week practitioner course, you will learn how to measure a process, analyze the results, develop process improvements and quantify the resulting savings. You will be required to complete a project demonstrating mastery of appropriate analytical methods and pass an examination to earn IIEâs Six Sigma Black Belt Certificate.This practitioner course for Six Sigma implementation provides extensive coverage of the Six Sigma process as well as intensive exposure to the key analytical tools associated with Six Sigma, including project management, team skills, cost analysis, FMEA, basic statistics, inferential statistics, sampling, goodness of fit testing, regression and correlation analysis, reliability, design of experiments, statistical process control, measurement systems analysis and simulation. Computer applications are emphasized.
NOTE: Participants must bring a laptop computer running Microsoft Office® to the seminar.
More Info: http://mapp.usc.edu/professionalprograms/ShortCourses/SixSigmaBlackBelt.htmAudiences: Registered Attendees
Contact: Viterbi Professional Programs
Event Link: http://mapp.usc.edu/professionalprograms/ShortCourses/SixSigmaBlackBelt.htm
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Pd.D. Defense
Tue, Jul 19, 2011 @ 02:30 PM - 04:30 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Yi-Hua Edward Yang, USC EE-Systems
Talk Title: Large-Scale and High-Throughput Pattern Matching on Parallel Architectures
Abstract: Large-scale pattern matching has many applications ranging from text processing to deep packet inspection (DPI) where hundreds or thousands of pre-defined strings or regular expressions (regexes) are matched concurrently and continuously against high-bandwidth input data. The large number of patterns and the high matching throughput make large-scale pattern matching both compute and memory intensive. In this thesis, we propose novel algorithms, constructions, and optimizations to accelerate large-scale pattern matching on two prominent classes of parallel architectures: Field Programmable Gate Arrays (FPGA) and general-purpose multi-core processors. We focus our studies on large-scale string pattern matching (SPM) and regular expression matching (REM) in the context of DPI for network intrusion detection.
For SPM, we propose a head-body partitioning to efficiently handle large dictionary. Specifically, we design a pipelined affix-search relay for accelerating the dictionary "head" on FPGA, as well as a body branch data structure with branch grafting for accelerating the dictionary "body" on processor core with single-instruction multiple-data (SIMD) operations. For REM, we propose a modified McNaughton-Yamada algorithm to convert an arbitrary regex into a modular NFA with uniform structure, which can be (1) mapped onto FPGA with spatial stacking and parallel SRL for scalable throughput and efficient resource utilization; (2) further partitioned into a segmented regex-NFA for efficient implementation in word-based operations on general-purpose processor core. We also develop software framework to automatically optimize our REM solutions. Overall, our designs achieve better memory efficiency, higher per-stream throughput, faster construction and better attack resilience over previous state-of-the-art solutions.
Finally, we formalize a novel semi-deterministic finite automaton for REM, offering space-time tradeoff between the compute-intensive NFA and the memory-intensive DFA. We propose the convolvement analysis and compatible state grouping algorithms to convert any NFA into a minimal SFA, whose space efficiency can then be traded off for lower time complexity.
Biography: Yi-Hua Edward Yang received the B.Sc. degree in Electrical Engineering from National Taiwan University, Taipei, Taiwan in 1997, and the M.Sc. degree in Electrical & Computer Engineering from University of Maryland, College Park, Maryland in 1999. He was a research assistant at the Information Sciences Institute, University of Southern California From 2005 to 2007. He is currently a Ph.D. candidate in the Ming Hsieh Department of Electrical Engineering, University of Southern California. His research interests include algorithmic optimization on parallel architectures, high performance architecture designs for network processing, security and cryptography.
Host: Defense Chair, Prof. Viktor K. Prasanna
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: EES & CS PhD Students & Faculty
Contact: Janice Thompson
