Events Calendar

Energy Informatics Distinguished Seminar

Speaker: Dr. Yale Patt, University of Texas at Austin

Talk Title: Parallelism: A serious goal or a silly mantra (...and what about the End of the Von Neumann Architecture)

Series: Distinguished Lecture Series in Energy Informatics

Abstract: The microprocessor of 2025 will have two things going for it: more than 50 billion transistors on each chip and an opportunity to properly harness the transformation hierarchy. We hear a lot about the parallelism that one will get from those 50 billion transistors. In fact, almost everyone in the computer industry these days seems to be promoting parallelism, whether or not they have any clue whatsoever as to what they are talking about. And, many also are announcing the demise of the Von Neumann Architecture, whether or not they have any idea what the Von Neumann architecture is. Both pronouncements are due in large part to the highly visible and well advertised continuing (temporarily) benefits of Moore's Law, manifest by more and more cores on a chip, as well as more and more accelerators on the chip. More transistors means more cores, which translates into more opportunity for parallelism. More transistors also means more opportunity to build the wildest of accelerators, touted as non-Von Neumann architecture. By 2025, we will clearly have more than 1000 cores on a chip -- whether we can effectively utilize them or not does not seem to curb the enthusiasm. And by 2025, we will also have lots of powerful accelerators. But without Von Neumann, they won't be of much use. What I would like to do today is examine parallelism, note that it did not start with the multicore chip, observe some of the silliness it has recently generated, identify its fundamental pervasive element, and discuss some of the problems that have surfaced due to its major enabler, Moore's Law. I would also like to try to show how the transformation hierarchy, without any observable fanfare, can turn the bad news of Moore's Law into good news, both for all those cores and for all those non-Von Neumann accelerators, and play an important role in the microprocessor of 2025.

Biography: Yale N. Patt is Professor of ECE and the Ernest Cockrell, Jr. Centennial Chair in Engineering at The University of Texas at Austin. He continues to thrive on teaching both the large (400+ students) freshman introductory course in computing and advanced graduate courses in microarchitecture, directing the research of eight PhD students, and consulting in the microprocessor industry. Some of his research ideas (e.g., HPS, the two-level branch predictor, ACMP) have ended up in the cutting-edge chips of Intel, AMD, etc. and some of his teaching ideas have resulted in his motivated bottom-up approach for introducing computing to serious students. The textbook for his unconventional approach, "Introduction to Computing Systems: from bits and gates to C and beyond," co-authored with Prof. Sanjay Jeram Patel of Illinois (McGraw-Hill, 2nd ed. 2004), has been adopted by more than 100 universities world-wide. He has received the highest honors in his field for both his reasearch (the 1996 IEEE/ACM Eckert-Mauchly Award) and teaching (the 2000 ACM Karl V. Karlstrom Outstanding Educator Award). He was the inaugural recipient of the recently established IEEE Computer Society Bob Rau Award in 2011, and was named the 2013 recipient of the IEEE Harry Goode Award. He is a Fellow of both IEEE and ACM, and a member of the National Academy of Engineering. More detail can be found on his web page www.ece.utexas.edu/~patt.

Host: Prof. Viktor Prasanna and the Ming Hsieh Institute

Webcast: https://bluejeans.com/275381990

Location: Hughes Aircraft Electrical Engineering Center (EEB) - 132

WebCast Link: https://bluejeans.com/275381990

Audiences: Everyone Is Invited

Contact: Annie Yu