Events Calendar

Integrated Systems Seminar Series

Speaker: Prof. Andreas G. Andreou, IEEE Fellow, Johns Hopkins University

Talk Title: BRAINWAY: Cognitive Computing using Energy Efficient Physical Computational Structures, Algorithms and Architecture Co-Design

Series: Integrated Systems Seminar

Abstract: The BRAINWAY project in my lab is aimed at the design of an energy efficient Cognitive Processor Unit (CogPU) that combines Ultra-Low-Voltage (ULV) circuit techniques with brain-inspired chip multiprocessor network-on-chip (NoC) architecture, in 3D CMOS technology. The design of the CopPU architecture is based on the recently developed mathematical framework for architecture exploration and optimization, where neurons are abstracted as arithmetic units, processing information using stochastic or deterministic unary representations. Data in the system represent probabilities a choice that is well suited for probabilistic inference and machine learning. Such highly energy efficient CogPU inference engine will provide an energy efficiency gain of about x65 by using ULV techniques and massive parallelism, a gain of about x10 by relying on its SOC 3D DRAM, and a gain of about x15 by relying on new memory based Bayesian inference computational structures. This yields an estimate aggregate improvement factor in energy efficiency of about x10000, roughly four to five orders of magnitude with respect to present day state-of-the-art. Preliminary results from fabricated chips in the Global Foundries 55nm technology confirm our estimates and to the best of our knowledge these are the first CMOS computer architecture that computes natively with probabilities. I will discuss the design and experimental results from sub-systems of the architecture, representing processing units for exact and approximate Bayesian inference, multi-variate function approximation, including circuit details for mixed signal vector-vector multiplier units, physical random number generators and probability approximators

Biography: Dr. Andreas G. Andreou is a professor of electrical and computer engineering, computer science and the Whitaker Biomedical Engineering Institute, at Johns Hopkins University. Andreou is the cofounder of the Johns Hopkins University Center for Language and Speech Processing. Research in the Andreou lab is aimed at brain inspired microsystems for sensory information and human language processing. Notable microsystems achievements over the last 25 years, include a contrast sensitive silicon retina, the first CMOS polarization sensitive imager, silicon rods in standard foundry CMOS for single photon detection, hybrid silicon/silicone chip-scale incubator, and a large scale mixed analog/digital associative processor for character recognition. Significant algorithmic research contributions for speech recognition include the vocal tract normalization technique and heteroscedastic linear discriminant analysis, a derivation and generalization of Fisher discriminants in the maximum likelihood framework. In 1996 Andreou was elected as an IEEE Fellow, "for his contribution in energy efficient sensory Microsystems."

Host: Hosted by Prof. Hossein Hashemi, Prof. Mike Chen, and Prof. Mahta Moghaddam. Organized and hosted by SungWon Chung.

Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248

Audiences: Everyone Is Invited

Contact: Elise Herrera-Green