Events Calendar

Shared Memory Reconfigurable Computing for the Cloud

Speaker: Dr. Peter Hofstee, IBM Austin Research Laboratory

Talk Title: Shared Memory Reconfigurable Computing for the Cloud

Abstract: This talk covers recent work on shared memory reconfigurable computing. We start with enhancements made to the Power 8 processor, in particular the CAPI interface that allows for off-chip accelerators with full coherent access to all shared system resources. Next we cover some examples of how this kind of acceleration can improve system functions such as networking and storage. We then turn to gene sequencing as an example of compute acceleration and show that each of the major stages can be improved with reconfigurable logic. We end by discussing prototype cloud-based infrastructure that researchers can use to develop and deploy their own solutions.

Biography: H. Peter Hofstee (Ph.D. California Inst. of Technology, 1995) is a distinguished research staff member at the IBM Austin Research Laboratory, USA, and a part-time professor in Big Data Systems at Delft University of Technology, Netherlands. Peter is best known for his contributions to heterogeneous computer architecture as the chief architect of the Synergistic Processor Elements in the Cell Broadband Engine processor, used in the Sony Playstation3 and the first supercomputer to reach sustained Petaflop operation. After returning to IBM research in 2011 he has focused on optimizing the system roadmap for big data, analytics, and cloud, including the use of accelerated compute. His early research work on coherently attached reconfigurable acceleration on Power 7 paved the way for the new coherent attach processor interface on POWER 8. Peter is an IBM master inventor with more than 100 issued patents and a member of the IBM Academy of technology.

Host: Prof. Viktor Prasanna

Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248

Audiences: Everyone Is Invited

Contact: Annie Yu