Fri, Mar 08, 2019 @ 02:00 PM - 03:30 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Mingu Kang, IBM Thomas J. Watson Research Center
Talk Title: Energy-efficient machine learning in resource-constrained edge-computing platforms
Abstract: There is much interest in embedding data analytics into sensor-rich platforms such as wearables, biomedical devices, autonomous vehicles, robots, and Internet-of-Things (IoT) to provide these with decision-making capabilities. Such platforms need to implement machine learning algorithms under severe resource-constraints in embedded battery-powered platforms. However, traditional von Neumann architectures suffer from explicit separation between memory and computation (the "Memory Wall"), which imposes bottlenecks on energy efficiency and throughput for big data processing.
In this talk, I will present deep in-memory computing architecture (DIMA), where analog computation is deeply embedded into a standard memory array to overcome the memory wall. First, the data flow of machine learning algorithms is analyzed to show how it naturally leads to the DIMA. Next, the design of a multi-functional DIMA IC prototype will be presented to validate the concept of DIMA and demonstrate its versatility. An in-memory instruction set architecture with LLVM-based compiler is demonstrated to provide user-friendly programming interface, and optimal resource allocation for target application accuracy. DIMA lends itself to a communication-inspired system analysis that helps to understand the fundamental trade-off between its energy and accuracy in the low-SNR regime. Finally, I will present future research directions spanning device, architecture, and system to build large-scale system-on-chip by leveraging non-conventional computing including in-memory, in-sensor, and neuromorphic computing.
Biography: Mingu Kang is a research staff member of the IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA, where he designs machine learning accelerator architecture. He received the Ph.D. degree in Electrical and Computer Engineering from the University of Illinois at Urbana-Champaign, Champaign, IL, USA, in 2017, and the B.S. and M.S. degrees in Electrical and Electronic Engineering from Yonsei University, Seoul, South Korea, in 2007 and 2009, respectively. From 2009 to 2012, he was with the Memory Division, Samsung Electronics, Hwaseong, South Korea, where he was involved in the circuit and architecture design of phase change memory (PRAM). His current research interests include low-power integrated circuits, architecture, and system for machine learning and signal processing by leveraging emerging computing paradigms. He is a recipient of UIUC Coordinated Science Lab (CSL) best thesis award in 2018, MICRO TOP Pick Honorable Mention 2019, IEEE International Symposium on Circuits and Systems (ISCAS) "Neural System and Application" Best Paper Awards in 2016 and 2018, and Kwanjeong Scholarship from 2012 to 2017.
Audiences: Everyone Is Invited
Contact: Marilyn Poplawski