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  • Seminar

    Wed, Aug 21, 2019 @ 10:00 AM - 12:00 PM

    Ming Hsieh Department of Electrical and Computer Engineering

    Conferences, Lectures, & Seminars

    Speaker: Peter Hofstee and Johan Peltenburg, Delft University of Technology, Netherlands

    Talk Title: The Fletcher Framework, Bringing Apache Arrow to FPGAs

    Abstract: Modern big data systems are highly heterogeneous. Components are implemented in a wide variety of programming languages and frameworks. Due to implementation differences, interfaces between components are burdened by serialization overhead. The Apache Arrow project helps to overcome this burden through a language-agnostic columnar in-memory format for big data applications. It is currently being integrated in many big data analytics frameworks, such as Apache Spark & Parquet, Dask, Pandas, etc...
    The open-source Fletcher framework is an implementation of Arrow for FPGA accelerators. Through a design generation step, Fletcher takes Arrow data structures and generates specialized, high-performance and easy-to-use hardware interfaces that can connect to accelerator kernels. Serialization overhead is prevented, and integration with over 11 high-level languages is made possible and efficient.

    After a brief introduction providing context for shared-memory heterogeneous computing using some of the current POWER systems as examples, we will go over the benefits of Apache Arrow and Fletcher, show a hands-on example, and discuss related projects, such as applying SQL queries to the Arrow datasets in FPGA, reading and decompressing Parquet files on the fly using FPGA, straight into host-system memory.

    Biography: Peter Hofstee is a distinguished research staff member at IBM Austin, USA, and a part-time professor in Big Data Systems at Delft University of Technology, Netherlands. He is best known for his contributions to Heterogeneous computing as the chief architect of the Synergistic Processor Elements in the Cell Broadband Engine processor used in the Sony PlayStation 3, and the first supercomputer to reach sustained Petaflop operation. After returning to IBM research in 2011 he has focused on optimizing the system roadmap for big data, analytics, and cloud, including the use of accelerated computation. His early research work on coherently attached reconfigurable acceleration on POWER7 paved the way for the new coherent attach processor interface on POWER8. He holds more than 100 issued patents.

    Johan Peltenburg is a PhD Candidate from the Delft University of Technology in The Netherlands. His research focuses on heterogeneous computing for big data applications. Johan received his B. Eng in Electrical Engineering at the Rotterdam University of Applied Science, followed by an M.Sc. in Computer Engineering at the Delft University of Technology. After spending some years in industry and as a teacher at the Rotterdam University of Applied science, Johan joined the Quantum & Computer Engineering department of the TU Delft in 2016, where he pursues his Ph.D. degree in Computer Engineering. He is currently working on the Fletcher FPGA accelerator framework within the Accelerated Big Data Systems group.

    Host: Murali Annavaram

    Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248

    Audiences: Everyone Is Invited

    Contact: Estela Lopez

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