Events Calendar

Merging Application and Circuit Knowledge for Innovative Circuit Design

Presented by Bita NezamfarAbstract: The continued scaling of CMOS technology has enabled incredible computing devices to be created, but has also pushed these devices to their energy dissipation limits. As a result, creating energy efficient systems has emerged as the dominant challenge for the foreseeable future. To make radical improvements to system efficiency, all degrees of freedom in the design need to be identified and exploited. In particular, for energy-efficient circuit design, this level of optimization is possible by understanding the source and nature of the constraints imposed both by technology and application and joint optimization of circuits and algorithms. This talk provides a few examples of how this merging of application and circuit knowledge makes it possible to improve efficiency. Our first example is building supply noise measurement circuits to measure and characterize high frequency supply noise on the chip. In theory, accurate sampling of high-frequency data requires high bandwidth and high resolution analog to digital converters. However, we will discuss how correct interpretation of system-level constraints enables using very simple and non-linear analog to digital converters to obtain all the required data to accurately characterize supply noise. As the next example we discuss the design of a "field-tunable" field-programmable gate array (FPGA). A state of the art FPGA is fairly optimized and resilient to change due to the large stack of software that is developed and optimized for the circuit-level architecture. We first show how interconnect blocks in the FPGA can change to add one more degree of programmability to the system without changing the interface to the higher-level software. This additional degree of freedom enables the FPGA to be programmed for high performance or low power in the field (post fabrication) based on the application of interest. We propose a new logic, called pseudo-static that can effectively utilize this degree of freedom while also improving FPGA performance. Measured results of a 90nm CMOS test-chip are presented and we conclude the talk by discussing a few other examples of application oriented circuit design.Biography: Bita Nezamfar received the Ph.D. and M.Sc. degrees from Stanford University, CA, in 2009 and 2004 respectively, and the B.Sc. degree from Sharif University of Technology, Tehran, Iran, all in electrical engineering. From 2003 to 2008, she was a Research Assistant with the VLSI Group, Stanford University, where she was involved with the design of on-chip supply noise measurement circuits, and energy performance tunable circuits. In summer of 2006, she was an intern with Aeluros Inc. where she worked on different blocks of a clock synthesizer chip. She is currently with Atheros Communications designing low-power analog circuits for wireless communications. Her research interests include application oriented circuit design and design and implementation of low power and high speed mixed signal systems.

Location: Seaver Science Library (SSL) - 150

Audiences: Everyone Is Invited

Contact: Hazel Xavier