Events Calendar

Embracing the Power of Digital Logic for Future Mixed-Signal ICs

Mike Shuo-Wei ChenAbstract:
Over the years, the main stream CMOS technology has been scaling in favor of digital circuits at an explosive speed. It imposes increasing design constraints for analog circuits, such as lower supply voltages, lower gain, leakage currents, and noise, etc. On the other hand, the future radios will demand higher complexity and tighter circuit specifications. Driven by these trends, a new design philosophy is proposed to redefine analog circuit topologies that involve an architectural rethinking, utilizing almost free digital circuits and faster device speed. In this talk, we will examine such opportunities specifically in the mixed-signal IC area. We will use phase locked loop (PLL) and analog-to-digital converter (ADC) as case studies, which are critical components to enable future complex system-on-chip (SOC) and mostly-digital system architectures. In both cases, the performance and cost are substantially improved by adopting the new design philosophy.Biography:
Mike Shuo-Wei Chen received the B.S. degree from National Taiwan University in 1998, and the M.S. and Ph.D. degree from the University of California, Berkeley in 2002 and 2006, all in Electrical Engineering. Since 2006, he has been working on mixed-signal and RF circuits for WLAN radios in Atheros communications. His current research interests include analog and mixed-signal ICs, communication system designs, and signal processing techniques for circuits and systems. Dr. Chen achieved an honourable mention in Asian Pacific Mathematics Olympiad, 1994. He was the recipient of UC Regents' Fellowship at UC Berkeley in 2000 and Analog Devices Outstanding Student Award in 2006.

Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248

Audiences: Everyone Is Invited

Contact: Kim Reid