Logo: University of Southern California

Events Calendar


  • Design, Analysis, and Test of Logic Circuits under Uncertainty

    Thu, Apr 01, 2010 @ 02:15 PM

    Ming Hsieh Department of Electrical and Computer Engineering

    Conferences, Lectures, & Seminars


    Dr. Smita Krishnaswamy,
    IBM, TJ Watson Research CenterAbstract:
    Logic circuits are becoming increasingly susceptible to probabilistic behavior caused by external radiation and noise. In addition, inherently probabilistic quantum- and nano-technologies are on the horizon as we approach the limits of CMOS scaling. Ensuring the reliability of such circuits despite the probabilistic behavior is a key challenge in IC design---one that necessitates a fundamental, probabilistic reformulation of synthesis and testing techniques.In this talk, I will present techniques for analyzing, designing, and testing logic circuits with probabilistic behavior. First, I will present a mathematical formulation of reliability analysis using our probabilistic transfer matrix (PTM) algebra for representing probabilistic behavior in gates and circuits. Reliability analysis is a computationally-complex task, and scalability is particularly challenging. To this end, I present two scalable heuristics for approximate analysis in the contexts of testing and reliable design.The first heuristic, involving partial PTM computation, is used to generate tests for probabilistic faults. The second heuristic, known as AnSER, runs in linear time of the size of the circuit, and uses functional-simulation signatures and observability to determine the circuit's soft error rate (SER) accurately. The scalability of AnSER allows us to derive subtle, low-overhead design techniques that improve reliability. These techniques include partial-redundancy identification, guided rewriting, gate relocation, and observability-based retiming. I conclude by briefly covering ongoing research and future directions.Biography:
    Smita Krishnaswamy is currently a research staff member in the design automation group at IBM's TJ Watson Research Center, where she works on techniques for incremental design, logic synthesis, and physical synthesis. Her incremental design research has been extensively utilized in production of the P and Z series microprocessor chips.Smita obtained her Ph.D. in computer science and engineering from the University of Michigan, Ann Arbor, in 2008. She has received a 2009 EDAA Outstanding Dissertation Award, and a Best Paper Award at DATE 2005 for her doctoral work. Smita's research interests include fault tolerance, reliability, testing, logic synthesis, and CAD for emerging technologiesHosted by Prof. Sandeep Gupta

    Location: Henry Salvatori Computer Science Center (SAL) - -222

    Audiences: Everyone Is Invited

    Contact: Estela Lopez

    Add to Google CalendarDownload ICS File for OutlookDownload iCal File

Return to Calendar