Events Calendar

CENG Seminar

Speaker: Dr. Omer Khan, University of Massachusetts, Lowell & Massachusetts Institute of Technology (MIT)

Talk Title: Mechanisms for Scalable Multicores

Abstract: Today’s microprocessor is the system, where not only cores and interconnects with varying computational and communication capabilities are being integrated and connected on the same die, but traditional off-chip devices, such as memory controllers, DMA engines and video/graphic accelerators are being integrated on-chip. Spanning embedded, personal, supercomputing, cloud computing, and cyber-physical systems, single-chip multicores are expected to utilize integration and specialization to offer an opportunity for improvement in energy efficiency and processing performance. This talk introduces new architectural mechanisms which enable applications to utilize scalable multicore processors by addressing the question of what models for inter-core communication will result in highest performance, lowest energy consumption, and lowest programmer effort.

I will introduce the Execution Migration Machine (EM²); a thread migration based shared memory architecture that provides speedy access to on-chip distributed cache data by either migrating execution context or via round-trip remote cache accesses. Since only one copy of data is stored on-chip in a Non Uniform Cache Access (NUCA)-style organization, cache coherence and sequential consistency are trivially ensured without the need for complex directory coherence logic and large directories. I will present a one-step, hardware-level migration protocol that is deadlock-free, based on the concept of cores native to a thread. Finally, I will present hardware implementable migration prediction heuristics under this protocol that decide when to migrate or otherwise perform a remote access, and decide what part of the context to carry during a migration. EM² performs better than conventional remote access in a NUCA organization, because it better exploits locality.


Biography: Omer Khan is a Research Affiliate at Massachusetts Institute of Technology (MIT) and an Assistant Professor of Electrical and Computer Engineering at the University of Massachusetts, Lowell. During 2009-11, he was a Postdoctoral Research Scientist in the Computer Science and Artificial Intelligence Laboratory (CSAIL) at MIT. He received the Ph.D. degree in Electrical and Computer Engineering from the University of Massachusetts, Amherst in 2009. His teaching and research interests can be generalized to the field of computer architecture, digital system design and VLSI, and he has authored numerous papers in these areas. He also has more than seven years of industry experience at leading computer and semiconductor companies, Motorola (now Freescale) and Intel. He is a member of the IEEE.

Host: Prof. Sandeep Gupta

Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248

Audiences: Everyone Is Invited

Contact: Estela Lopez