Events Calendar

System-level performance analysis for programmable MPSOC architectures

Speaker: Patrick Lysaght, Senior Director, Xilinx Research Labs

Talk Title: System-level performance analysis for programmable MPSOC architectures

Abstract: As we transition into the “post-PC era”, embedded systems increasingly deploy heterogeneous, multi-processor system-on-chip (MPSOC) architectures. This talk is about system-level, design optimization in programmable, heterogeneous, MPSOC architectures for embedded applications. The focus is on programmable SOC platforms which integrate both embedded processors and field programmable gate arrays (FPGAs). The Xilinx Zynq family of All Programmable Systems on Chips is used as the reference. Zynq is the first programmable MPSOC family to integrate Xilinx FPGA fabric with ARM Cortex A9 processors in a high-performance, low-power 28nm process technology co-designed by Xilinx and TSMC.

System-level design optimization is important for the silicon architects who create the All Programmable Zynq device architectures and for the application architects who are responsible for mapping their applications to Zynq devices. The silicon and application architects share many of the same concerns, but they have very different perspectives. For example, static power consumption is a shared concern but an application-specific goal such as “faces recognized per second” is a metric only relevant to a particular application. For business and cost reasons, the design environments and tools available to both groups are also markedly different.

We focus in this talk on performance analysis and estimation. We address the experiences of the silicon architect and the application architect emphasizing what is common to both and also the significant differences. The goal is to work towards more efficient methodologies and tools capable of working at high levels of design abstraction while maximizing silicon efficiency.

Biography: Patrick Lysaght is a Senior Director in Xilinx Research Labs, in Xilinx San Jose, Ca. He leads a group whose research interests include system-level performance analysis and estimation, dynamically reconfigurable systems, and emerging design technologies for FPGAs. He also directs the worldwide operation of the Xilinx University Program (XUP). Before joining Xilinx, he held positions as a senior lecturer at the University of Strathclyde (Glasgow) and at the Institute for System Level Integration (Livingston, Scotland). He started his career in research and development with Hewlett Packard (Edinburgh) before going on to hold a number of technical and marketing positions. Patrick has co-authored more than fifty technical papers, co-edited two books on programmable logic and holds eight US patents. He is actively involved in the organization of a number of international conferences and is chairman of the steering committee for FPL, the world’s largest conference dedicated to field programmable logic. Patrick holds a BSc (Electronic Systems) from the University of Limerick, Ireland and a MSc degree (Digital Techniques) from Heriot-Watt University in Edinburgh, Scotland.

Host: Professor Viktor K. Prasanna

Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248

Audiences: Everyone Is Invited

Contact: Janice Thompson