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Events for October 12, 2016
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ASBME Amgen Info Session
Wed, Oct 12, 2016 @ 07:00 AM - 08:00 PM
Viterbi School of Engineering Student Organizations
Student Activity
Are you interested in industry opportunities? Join ASBME for our first industry info session of the year with Amgen during fall recruitment season. Amgen is a major biopharmaceutical and therapeutics company based in Thousand Oaks, CA.This will be a great opportunity to meet with representatives from Amgen in a more relaxed environment than at VINE or the Career Fair. Come out and learn more about the company and their potential internship, co-op and full-time opportunities! Subway will be served as dinner.
Location: Ronald Tutor Campus Center (TCC) - 450
Audiences: Everyone Is Invited
Contact: Associated Students of Biomedical Engineering
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Learning to Live with Errors: The Challenges and Solutions for Memory Reliability in the Sub-20nm Regime
Wed, Oct 12, 2016 @ 10:00 AM - 11:30 AM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Prashant J. Nair, Ph.D. Candidate, Georgia Institute of Technology
Talk Title: Learning to Live with Errors: The Challenges and Solutions for Memory Reliability in the Sub-20nm Regime
Abstract: Technology scaling, the prime driver for high-capacity memory systems, continues to be critical for current applications and acts as a key enabler for future applications. Unfortunately, scaling DRAM below sub-20nm is already becoming a challenge due to small feature sizes and flaky cells. Designers are also investigating alternative technologies such as die-stacking and Non-Volatile Memories (NVM), which makes the memory system susceptible to new failure modes (such as TSV failures). At these high error rates and failure modes, memory reliability challenges pose a serious threat to scaling. Furthermore, the cost of mitigating these failures with traditional solutions becomes impractically high. The goal of my thesis is to investigate architectural techniques to enable reliable and scalable memory systems at negligible overheads. In this talk, I will discuss three low-cost techniques to mitigate memory failures.
First, I will advocate a cross-layer approach to tolerating memory failures, whereby the scaling faults are exposed to the architecture level and a simple error-correction code is used to tolerate scaling failures. Such a scheme can tolerate error rates as high as 100 parts per million with a negligible storage overhead. Second, I will discuss the challenges of TSV-failures for die-stacked memory systems and present techniques that can mitigate TSV and other large failures at runtime using a RAID-based technique. Finally, I will discuss a scheme called XED that can obtain Chipkill-level reliability by using 2x fewer chips for memory systems with On-Die ECC. XED mitigates the performance and power overheads of Chipkill without requiring any changes to the memory interface and transparently exposing the error detection information from each chip to the memory controller. Overall, this talk aims to showcase techniques that will enable dense, efficient and reliable memories that are robust to the pitfalls of technology scaling and die-stacking.
Biography: Prashant J. Nair is a Ph.D. candidate in Georgia Institute of Technology where he is advised by Professor Moinuddin Qureshi. He received his MS (2011-2013) from Georgia Institute of Technology and his BE in Electronics Engineering (2005-2009) from University of Mumbai. His research interests include reliability, performance, power and refresh optimizations for current and upcoming memory systems. In these areas, he has authored and co-authored 9 papers in top-tier venues such as ISCA, MICRO, HPCA, ASPLOS and DSN. Prashant organized the "Memory Reliability Forum" (co-located with HPCA 2016) to highlight the importance of memory reliability to the wider architecture community. He served as the Submission's Co-chair of MICRO 2015 and in the ERC of ISCA 2016. During his Ph.D., he interned at several leading industrial labs including AMD, Samsung, Intel and IBM.
Host: Murali Annavaram
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Estela Lopez
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MHI CommNetS Seminar
Wed, Oct 12, 2016 @ 02:00 PM - 03:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Dr. Athina Petropulu, Rutgers University
Talk Title: Optimal Co-Design for Co-existence of MIMO Radars and MIMO Communication Systems
Series: CommNetS
Abstract: Spectrum congestion in commercial wireless communications is a growing problem as high-data-rate applications become prevalent. In an effort to relieve the problem, US federal agencies intend to make available spectrum in the 3.5 GHz band, which was primarily used by federal radar systems for surveillance and air defense, to be shared by both radar and communication applications. Even before the new spectrum is released, high UHF radars overlap with GSM communication systems, and S-band radars partially overlap with Long Term Evolution (LTE) and WiMax systems. When communication and radar systems overlap in the frequency domain, they exert interference to each other. Spectrum sharing is a new line of work that targets at enabling radar and communication systems to share the spectrum efficiently by minimizing interference effects. The current literature on spectrum sharing includes approaches which either use large physical separation between radar and communication systems, or optimally schedule dynamic access to the spectrum by using OFDM signals, or allow radar and communication system to co-exist in time and frequency via use of multiple antennas at both the radar and communication systems. The latter approach greatly improves spectral efficiency as compared to the other approaches. This talk presents our recent work on the latter approach. In particular, we discuss optimal co-design of MIMO radars and MIMO communication system signaling schemes, so that the effective interference power to the radar receiver is minimized, while a desirable level of communication rate and transmit power are maintained.
Biography: Athina Petropulu received her undergraduate degree from the National Technical University of Athens, Greece, and the M.Sc. and Ph.D. degrees from Northeastern University, Boston MA, all in Electrical and Computer Engineering. Since 2010, she is Professor of the Electrical and Computer Engineering (ECE) Department at Rutgers, having served as chair of the department during 2010-2016. Before that she was faculty at Drexel University. Dr. Petropulu's research interests span the area of statistical signal processing, wireless communications, signal processing in networking, physical layer security, and radar signal processing. Her research has been funded by various government industry sponsors including the National Science Foundation, the Office of Naval research, the US Army, the National Institute of Health, the Whitaker Foundation, Lockheed Martin and Raytheon.
Dr. Petropulu is Fellow of IEEE and recipient of the 1995 Presidential Faculty Fellow Award given by NSF and the White House. She has served as Editor-in-Chief of the IEEE Transactions on Signal Processing (2009-2011), IEEE Signal Processing Society Vice President-Conferences (2006-2008), and member-at-large of the IEEE Signal Processing Board of Governors. She was the General Chair of the 2005 International Conference on Acoustics Speech and Signal Processing (ICASSP-05), Philadelphia PA. In 2005 she received the IEEE Signal Processing Magazine Best Paper Award, and in 2012 the IEEE Signal Processing Society Meritorious Service Award for "exemplary service in technical leadership capacities". She was selected as IEEE Distinguished Lecturer for the Signal Processing Society for 2017-2018.
More info on her work can be found at www.ece.rutgers.edu/~cspl
Host: Dr. Ashutosh Nayyar
More Info: http://ee.usc.edu/~ashutosn/CommNetS2016/dokuwiki/doku.php?id=start
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Annie Yu
Event Link: http://ee.usc.edu/~ashutosn/CommNetS2016/dokuwiki/doku.php?id=start
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CIA Info Session
Wed, Oct 12, 2016 @ 05:30 PM - 06:30 PM
Viterbi School of Engineering Career Connections
Workshops & Infosessions
CIA's Deputy Director for the Directorate of Digital Innovation will lead an information session regarding CIA career opportunities in Digital Innovation. All undergraduate and graduate students are encouraged to attend. All CIA careers require U.S. citizenship and relocation to the Washington, DC area.
Location: Seeley G. Mudd Building (SGM) - 101
Audiences: All Viterbi
Contact: RTH 218 Viterbi Career Connections
