Events Calendar

PhD Dissertation Defense - Navid Hashemi

Title:  Scaling Control Synthesis and Verification in Autonomy Using Neurosymbolic Methods  
 
Committee Members: Jyotirmoy Deshmukh (Chair), Bhaskar Krishnamachari, Chao Wang, Lars Lindemann, Georgios Fainekos  
 
Date and Time: Wednesday, Oct. 23rd, 2024 - 1:30p - 2:50p  
 
Location: DMC 111  
 
Abstract:  As the field of autonomy is embracing the use of neural networks for perception and control, Signal Temporal Logic (STL) has emerged as a popular formalism for specifying the task objectives and safety properties of such autonomous cyber-physical systems (ACPS). There are two important open problems in this research area: (1) how can we effectively train neural controllers in such ACPS applications, when the state dimensionality is higher and when the task objectives are specified over longer time horizons, and (2) how can we verify if the closed-loop system with a given neural controller satisfies given STL objectives. We review completed work in which we show how discrete-time STL (DT-STL) specifications lend themselves to a smooth neuro-symbolic encoding that enables the use of gradient-based methods for control design. We also show how a type of neuro-symbolic encoding of DT-STL specifications can be combined with neural network verification tools to provide deterministic guarantees. We also review how neural network encoding of the environment dynamics can help us combine statistical verification techniques with formal techniques for reachability analysis.  

Audiences: Everyone Is Invited

Contact: Navid Hashemi