-
ECE Seminar: Scaling Energy Efficiency of Mobile XR using Hardware/Software Codesign
Wed, Nov 13, 2024 @ 10:00 AM - 11:00 AM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Dr. Scott Mahlke, Claude E. Shannon Professor of Engineering Sciences, EECS Department, University of Michigan
Talk Title: Scaling Energy Efficiency of Mobile XR using Hardware/Software Codesign
Abstract: Extended Reality (XR) is an important frontier in technology that combines virtual reality (VR) wherein users are immersed in a virtual world and augmented reality (AR) wherein virtual content is overlayed on the real world. Mobile XR focuses on the realization of AR/VR technologies in the context of portable headsets and other wearable technology, which severely restricts power dissipation and weight requirements for the onboard computing and sensory systems. The constraints preclude direct adoption of desktop/server solutions, instead require efficiency scaling by one to two orders of magnitude. To solve this problem, this work focuses on specialization of both the XR software stack and the underlying hardware. On the software side, simultaneous localization and mapping (SLAM) algorithms that track an agent's movements through an unknown environment are too computationally expensive to be applied in a brute-force manner. Instead, we develop SlimSLAM, a domain-specific runtime scheduler, which adapts SLAM algorithmic parameters based on input needs, minimizing computation while maintaining accuracy. SlimSLAM exploits information from a SLAM algorithm's state to detect and adjust over-provisioned parameters in real-time. SlimSLAM outperforms other adaptive approaches by an average of 2.3x with iso-accuracy. On the hardware side, we focus on in-memory computing that enables data parallel computation to occur in-place in an on-chip memory system, thereby eliminating data movement into and out of the processor and achieving high levels of data parallel computation. Specifically, we develop a duality cache architecture that flexibly transforms caches on demand into programmable in-memory accelerators that can execute arbitrary data-parallel programs commonly used in AR/VR. The cache accelerator outperforms a server-class GPU by 3.6x and CPU by 72.6x with only a 3.5% area cost across a range of data parallel applications.
Biography: Scott Mahlke is the Claude E. Shannon Professor of Engineering Sciences in the EECS Department at the University of Michigan. He leads the Compilers Creating Custom Processors research group that focuses on hardware/software technologies for scaling performance, energy efficiency, and cost of computing systems through specialization of the hardware down to the software it runs. Mahlke has won numerous awards including the 2022 IEEE B. Ramakrishna Rau Award, and is a Fellow of the IEEE and ACM.
Host: Drs. Murali Annavaram (annavara@usc.edu) and Viktor Prasanna (prasanna@usc.edu)
Webcast: https://usc.zoom.us/j/97853375830?pwd=3oQpMoZJyA9SVdgaGf40va9ObZJl4r.1 (USC NetID log in required)Location: Hughes Aircraft Electrical Engineering Center (EEB) - 132
WebCast Link: https://usc.zoom.us/j/97853375830?pwd=3oQpMoZJyA9SVdgaGf40va9ObZJl4r.1 (USC NetID log in required)
Audiences: Everyone Is Invited
Contact: Mayumi Thrasher