George Pfleger Chair in Electrical and Computer Engineering and Professor of Electrical and Computer Engineering
- Doctoral Degree, Electrical Engineering, Stanford University
- Master's Degree, Electrical Engineering, Stanford University
- Bachelor's Degree, Electrical Engineering, Ohio State University
Timothy M. Pinkston is holder of the George Pfleger Chair in Electrical and Computer Engineering, former holder of the Louise L. Dunn Endowed Professorship in Engineering, and Professor of Electrical and Computer Engineering at the University of Southern California (USC). He also is the Vice Dean for Faculty Affairs in the USC Viterbi School of Engineering. He earned a B.S.E.E. degree from The Ohio State University in 1985, and he earned M.S. and Ph.D. degrees in Electrical Engineering from Stanford University in 1986 and 1993, respectively.
Prior to joining USC in 1993, he was a Member of Technical Staff at Bell Laboratories, a Hughes Doctoral Fellow at Hughes Research Laboratory, and a visiting researcher at IBM T. J. Watson Research Laboratory. He founded the SMART Interconnects Group at USC where he conducts research on computer systems architecture. With over a hundred peer-reviewed technical publications, he has made key research contributions to deadlock-free adaptive routing, router microarchitecture and interconnection networks (both distributed and on-chip networks) that achieve high-performance and energy-efficient data movement in multicore and multiprocessor computer systems--from embedded processors to compute servers to large-scale datacenters.
He has received prominent national awards, including the NSF Minority Research Initiation Award and NSF CAREER Award, and is the proud recipient of a Distinguished Alumnus Award for Academic Excellence from The Ohio State University's College of Engineering. He served three years (2005-2008) as an NSF Program Director in the CISE Directorate, serving the last year of his stint as the inaugural Lead Program Director for the newly established Expeditions in Computing Program. He has contributed other significant service to the profession as an Associate Editor of the IEEE Transactions on Parallel and Distributed Systems (TPDS), as a member of the Executive Committee of the IEEE Technical Committee on Computer Architecture (TCCA), a Co-Chair of the SIGARCH/SIGMICRO Committee to Aid REporting on discrimination and haraSsment policy violations (CARES), a Board Member of the Computing Research Association (CRA), a member of the NSF Computer and Information Science and Engineering (CISE) Advisory Committee (from May 2021), and a contributor in several key leadership roles and on many technical program committees for top, flagship conferences in the field, including serving as General Co-Chair for the 45th ACM/IEEE International Symposium on Computer Architecture (ISCA'18), Program Chair of the 15th IEEE International Symposium on High Performance Computer Architecture (HPCA'09), and General Chair of the 21st IEEE International Parallel and Distributed Processing Symposium (IPDPS'07). He also co-organizes the CMD-IT Annual Academic Workshop for Underrepresented Ethnic Minorities and Persons with Disabilities, and he engages in many other efforts to broaden the participation and development of persons from populations currently underrepresented in computing and engineering. Dr. Pinkston is a AAAS Fellow, ACM Fellow, and IEEE Fellow.
The SMART Interconnects Group, headed by Timothy Pinkston, is engaged in research on technologies and techniques for achieving high-performance communication in parallel computer systems---symmetric multiprocessor systems as well as distributed network-based processing systems. Our efforts mainly focus on the interconnection network. We are developing efficient network interface and routing architectures/techniques that support high availability, reliability and quality of service. Deadlock-free adaptive routing techniques are being pursued that allow for maximum exploitation of routing freedom within the network. Network self-healing techniques are also being investigated that allow the network to dynamically self-check, reconfigure, and manage itself in the presence of expansion, hot-swapping, faults, and other anomalous conditions. We also have interest in designing, modeling and implementing high-bandwidth optical/optoelectronic-based interconnect! ion networks, network processors, and switch/router architectures. Below are some of the major contributions made thus far.
* In collaboration with others, we have developed a theory and methodology for the design of dynamic network reconfiguration techniques that result in minimal packet loss, are deadlock-free, and are generally applicable to high-performance and highly dependable interconnection networks.
* We have developed an intuitive model, a theoretical framework, and empirical simulation techniques for characterizing the causal effects of various network attributes on the formation of correlated resource dependencies and deadlock. This work provides the basis for alternative, more efficient deadlock-free routing approaches, such as deadlock recovery- based routing.
* We have introduced the idea of progressive deadlock recovery routing and have developed several fully-adaptive routing techniques for regular and irregular networks based on this approach. We have also proposed and implemented various router architecture optimizations applicable to deadlock-recovery routers.
* We have proposed and implemented portions of a hybrid cache coherence/network interconnect architecture designed to support low-latency interprocessor communication over point-to-point and broadcast optical channels.
* We have developed design methodologies and router architectures for energy-, resource-, and performance-efficient on-chip networks (a.k.a., NoCs), being among the first to explore architectural support for effectively applying power-saving techniques, such as power gating, to NoCs for reducing static power consumption. Our research contributions in this area advance fundamental understanding of how to design NoCs to enable scalable data movement with low power consumption, minimal resource requirements, and high performance.
* We have also designed, modeled and implemented several other optical/optoelectronic architectures with the collaboration of others. The theme and contribution of this work is in advancing basic research that addresses architectural issues related to the co-integration of promising optoelectronic components with highly functional logic circuitry typical of potential applications envisioned for this emerging technology, notably network routers.
- 2020 AAAS Fellow
- 2020 The Ohio State University College of Engineering Distinguished Alumnus Award for Academic Excellence
- 2019 ACM Fellow
- 2009 IEEE Fellow
- 2005 College of Engineering and MEP of The Ohio State University Distinguished Alumnus Award
- 2002 Intel Corp. Equipment Donation
- 2002 ICPP Finalist (Honorable Mention), Best Paper Award
- 2002 USC WISE Major Support for Continuing Faculty Award
- 1999 Compaq Inc. Equipment Donation
- 1998 Altera Corp. Equipment Donation
- 1997 Altera Corp. Equipment Donation
- 1997 Xilinx Corp. Equipment Donation
- 1994 USC Zumburge Foundation Award
- 1993 USC Powell Foundation Start-up Funds Award
- 1990 NSBE Best Technical Paper Award
- 1989 Stanford AAGSA Outstanding Student Award
- 1989 GTE Fellow
- 1989 Hughes Doctoral Fellow
- 1989 NSBE Outstanding Leadership and Service Award for Graduate Participation
- 1987 GE Fellow
- 1986 Bell Labs OYOC Fellow
- 1984 Graduate Education for Minorities (GEM) Fellow