Louise L. Dunn Endowed Professor in Engineering and Professor of Electrical Engineering-Systems
- 1993, PhD, Electrical Engineering, Stanford University
- 1992, PhD, Electrical Engineering, Stanford Univ
- 1986, Masters, Electrical Engineering, Stanford University
- 1985, Other, Electrical Engineering, Ohio State University
Ph.D. in Electrical Engineering, 1993, Stanford University, Palo Alto, CA.
Professor Pinkston completed his B.S.E.E. degree from The Ohio State University in 1985 and his M.S. and Ph.D. degrees in electrical engineering from Stanford University in 1986 and 1993, respectively. Prior to joining the University of Southern California (USC) in 1993, he was a Member of Technical Staff at Bell Laboratories, a Hughes Doctoral Fellow at Hughes Research Laboratory, and a visiting researcher at IBM T. J. Watson Research Laboratory. Presently, Dr. Pinkston is a Professor and Director of the Computer Engineering Division of the EE-Systems Department at the University of Southern California, and he heads the SMART Interconnects Group. His research interests include the development of deadlock-free adaptive routing techniques and on-chip network and router architectures for achieving high-performance communication in microprocessor and parallel computer systems---scalable parallel processor and cluster computing systems. Dr. Pinkston has over 100 technical publications and has received numerous awards, including the Zumberge Fellow Award, the National Science Foundation Research Initiation Award, and the National Science Foundation Career Award. Dr. Pinkston is a member of the ACM and a Fellow of the IEEE. He has also been a member of the Program Committee for several major conferences (ISCA, HPCA, ICPP, IPPS/IPDPS, ICDCS, SC, CS&I, CAC, PCRCW, OC, MPPOI, LEOS, WOCS, and WON); the General Chair of IPDPS'07; the Program Chair for HiPC'03, ICPADS'06, HPCA'09; the Program Vice-chair for EuroPar'03 and ICPADS'04; the Program Co-chair for MPPOI'97; the Tutorials Chair for ISCA'04; the Workshops Chair for ICPP'01 and ICPP'06; and the Finance Chair for Cluster 2001. He has served two 2-year terms as an Associate Editor for the IEEE Transactions on Parallel and Distributed Systems (TPDS) and has served as a Co-Guest Editor of TPDS for a Special Issue on On-Chip Networks.
The SMART Interconnects Group, headed by Timothy Mark Pinkston, is engaged in research on technologies and techniques for achieving high-performance communication in parallel computer systems---symmetric multiprocessor systems as well as distributed network-based processing systems. Our efforts mainly focus on the interconnection network. We are developing efficient network interface and routing architectures/techniques that support high availability, reliability and quality of service. Deadlock-free adaptive routing techniques are being pursued that allow for maximum exploitation of routing freedom within the network. Network self-healing techniques are also being investigated that allow the network to dynamically self-check, reconfigure, and manage itself in the presence of expansion, hot-swapping, faults, and other anomalous conditions. We also have interest in designing, modeling and implementing high-bandwidth optical/optoelectronic-based interconnect! ion networks, network processors, and switch/router architectures. Below are some of the major contributions made thus far.
* In collaboration with others, we have developed a theory and methodology for the design of dynamic network reconfiguration techniques that result in minimal packet loss, are deadlock-free, and are generally applicable to high-performance and highly dependable interconnection networks.
* We have developed an intuitive model, a theoretical framework, and empirical simulation techniques for characterizing the causal effects of various network attributes on the formation of correlated resource dependencies and deadlock. This work provides the basis for alternative, more efficient deadlock-free routing approaches, such as deadlock recovery- based routing.
* We have introduced the idea of progressive deadlock recovery routing and have developed several fully-adaptive routing techniques for regular and irregular networks based on this approach. We have also proposed and implemented various router architecture optimizations applicable to deadlock-recovery routers.
* We have proposed and implemented portions of a hybrid cache coherence/network interconnect architecture designed to support low-latency interprocessor communication over point-to-point and broadcast optical channels.
* We have also designed, modeled and implemented several other optical/optoelectronic architectures with the collaboration of others. The theme and contribution of this work is in advancing basic research that addresses architectural issues related to the co-integration of promising optoelectronic components with highly functional logic circuitry typical of potential applications envisioned for this emerging technology, notably network routers.
- 1984 Graduate Education for Minorities (GEM) Fellow
- 1986 Bell Labs OYOC Fellow
- 1987 GE Fellow
- 1989 Stanford AAGSA Outstanding Student Award
- 1989 GTE Fellow
- 1989 Hughes Doctoral Fellow
- 1989 NSBE Outstanding Leadership and Service Award for Graduate Participation
- 1990 NSBE Best Technical Paper Award
- 1993 USC Powell Foundation Start-up Funds Award
- 1994 USC Zumburge Foundation Award
- 1997 Altera Corp. Equipment Donation
- 1997 Xilinx Corp. Equipment Donation
- 1998 Altera Corp. Equipment Donation
- 1999 Compaq Inc. Equipment Donation
- 2002 Intel Corp. Equipment Donation
- 2002 ICPP Finalist (Honorable Mention), Best Paper Award
- 2002 USC WISE Major Support for Continuing Faculty Award
- 2005 College of Engineering and MEP of The Ohio State University Distinguished Alumnus Award
- 2009 IEEE Computer Society IEEE Fellow