POWER-AND RELIABILITY-AWARE DESIGN: CHALLENGES AND OPPORTUNITIES

DISTINGUISHED LECTURER SERIES"Power-and Reliability-Aware Design: Challenges and Opportunities"Dr. Pradip BoseIBM T.J. Watson Research CenterAbstract:The problem of escalating power dissipation at the processor, chip and system levels is quite well known. Thermal hot spots and resulting lifetime reliability concerns have also been highlighted in recent publications and talks. The problem of soft errors (which is not always a byproduct of the thermal problem) is also a hot topic of discussion within the microprocessor R&D community. In this particular talk, I will review some of those challenges from the perspective of early-stage microarchitecture and system design, and point to a range of solution approaches that are currently on the horizon. As part of my talk, I will also try to highlight some of the open research problems and issues that we need help with from the academic research community. One of the themes that I would like to touch on, in this context, is that of the formulation of technically sound metrics of evaluation when we strive for efficiency in design, related to the dimensions of power, performance and reliability. The challenge of developing acceptably accurate pre-silicon evaluation models is of course the larger problem that the metrics issue naturally leads into.Bio:Pradip Bose is a Research Staff Member and Manager of the Reliability- and Power-Aware Microarchitecture department at IBM T. J. Watson Research Center, Yorktown Heights, NY. He received his undergraduate engineering degree from I.I.T Kharagpur in India, and his M.S. and Ph.D degrees in electrical and computer engineering from University of Illinois at Urbana-Champaign. He has been with IBM Research since 1983, where he was part of the first super scalar RISC R&D group at the T. J. Watson Research Center. Since then, Pradip has been involved in all the POWER-series microprocessor development projects within IBM. His current research interests are in high performance computer architecture, power- and reliability-aware design and related pre-silicon modeling methodologies. Pradip is active in all the leading architecture conferences, and is currently the editor-in-chief of IEEE Micro magazine.Host: Prof. Timothy Pinkston, x04482 [A reception will follow at 3:00p.m.]

Location: Ethel Percy Andrus Gerontology Center (GER) - ontology Auditorium

Audiences: Everyone Is Invited

Contact: Rosine Sarafian