Cell Processor: Motivation, Architecture, Design, Programming and Applications

CENG SEMINAR SERIES"Cell Processor: Motivation, Architecture, Design, Programming and Applications"Dr. H. Peter HofsteeIBMABSTRACT:This talk will present the Cell processor, jointly developed by the STI partnership. Cell is a non-homogeneous chip multiprocessor intended for general-purpose applications but with a particular emphasis on multimedia performance. The Cell processor combines a 64bit Power Architecture(TM) core with 8 Synergistic Processors. In many cases delivers more than an order of magnitude more performance than conventional PC processors. Cell achieves this performance and power efficiency improvement by a new division of labor between the Power core and the Synergistic Processors. Cell allows for a wide variety of programming models, a selection of which will be presented in this talk. We will end the talk by discussing some applications that seem to fit the Cell processor particularly well, and by indicating areas of further exploration.BIO:Dr. H. Peter Hofstee is the chief architect of the Cell Synergistic Processor, and Cell Broadband Engine chief scientist. He received his PhD in computer science from the California Institute of Technology (Caltech) in 1995, and joined the Caltech faculty in 1995 and 1996 to teach computer science and VLSI. In 1996 he joined the IBM Austin research laboratory where he helped create the first GHz CMOS processor. Between 1997 and 2000 he worked on a number of other high-frequency server processor designs. In 2000 he helped create the concept for Cell and became one of the founding members of the STI (Sony -Toshiba -IBM) design center in the spring of 2001. His current interest focuses on application of the Cell processor beyond the gaming space and on future Cell designs.Host: Prof. Timothy Pinkston, x04482

Location: Hughes Aircraft Electrical Engineering Center (EEB) - -248

Audiences: Everyone Is Invited

Contact: Rosine Sarafian