Challenges in Reducing High Volume Manufacturing Test Cost for Micro-processors

CENG SEMINAR SERIES"Challenges in Reducing High Volume Manufacturing Test Cost for Micro-processors "Dr. Sreejit ChakravartyIntelABSTRACT:This talk is aimed at a general audience who are not familiar with Microprocessor testing. The basics of high volume manufacturing (HVM) testing will be introduced. The major cost components of HVM testing and the challenges going forward will be highlighted. Detailed discussion on any given topic will be left to the Q&A session.BIO:Dr. Sreejit Chakravarty spent about 11 years in academia as an Associate Professor of Computer Science at the State University of New York at Buffalo. Since 1997 he has been with Intel Corporation where he is a Principal Engineer in the Test Technology group. He is the technical lead in various test research projects targeted at Intel's microprocessor products, including advanced fault models, various aspects of at-speed testing and PV-si correlation issues. He serves on the program and organizing committees of several IEEE conferences and has delivered several keynote addresses at IEEE sponsored conferences. Dr. Chakravarty is a Fellow of the IEEE. Host: Prof. Melvin Breuer, x04469

Location: Hughes Aircraft Electrical Engineering Center (EEB) - -248

Audiences: Everyone Is Invited

Contact: Rosine Sarafian