Radiation Effects Challenges in Commercial-Density SRAMS

Abstract: The space electronics industry is at an interesting crossroads. The space electronics demand is not sufficient to continue to justify the costs of building radiation-hardened IC fabrication foundries, which have risen to the multi-billion dollar range for deep-submicron technologies. The main thrust of the Radiation-Hardened-by-Design (RHBD) research area is to use architecture, circuit design, and layout techniques to build chips that are radiation-tolerant by using commodity commercial foundry lines. Under the sponsorship of the DARPA RHBD program, our research group has fabricated two 64Kbit SRAM devices in IBM 90nm technology using such techniques. The test results show that our resulting designs perform well in radiation environments with regard to single-event effects (SEE) with little area and speed penalties. The results also show that increased leakage power induced by high total ionizing dose (TID) is negligible below TID levels of 300 KRads. Bio: Dr. Jeff Draper holds joint appointments at USC as a Research Assistant Professor in the Ming Hsieh Department of Electrical Engineering and Project Leader at Information Sciences Institute. In addition to the RHBD work described above, his group contributed to the architecture and VLSI implementation of the MONARCH chip in IBM 90nm technology, a 100M-gate chip containing 6 RISC processors, 12 MB of embedded DRAM, a polymorphic streaming computing fabric, and several external ports. This combination of elements offers over 64 GFLOPS of computing throughput with 60 GB/s of memory bandwidth. Prior to this work, Dr. Draper's group completed the development of a 56-million transistor processing-in-memory (PIM) chip using TSMC 0.18-micron technology for the DIVA project. Dr. Draper received a BS in Electrical Engineering from Texas A & M University and an MSE and PhD in Computer Engineering from the University of Texas at Austin. He has published over 70 papers on many aspects of computer architecture and VLSI. His research interests are resilient computing, radiation hardening by design, PIM architectures, networks-on-chip, and multi-core architectures.

Location: Ronald Tutor Hall of Engineering (RTH) - 306

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Contact: Annie Yu