Events for the 5th week of August
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Center for Systems and Control (CSC@USC) and Ming Hsieh Institute for Electrical Engineering
Mon, Aug 28, 2017 @ 02:00 PM - 03:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Terence Sanger, University of Southern California
Talk Title: Rate coding, spike coding, and biological control
Series: Fall 2017 Joint CSC@USC/CommNetS-MHI Seminar Series
Abstract: Although biological and artificial computation must solve similar problems, they do so in very different ways. I will discuss several closely related topics in biological control systems. Risk-aware control is a set of human behaviors in asymmetric cost environments that set the groundwork and requirements for models of biological feedback control. Stochastic Dynamic Operators provide a set of tools for control of uncertain stochastic systems, and I show that these operators can implement risk aware control in a simple robotic visual targeting task. I also show how the calculations necessary for control and stabilization can be implemented in populations of asynchronous spiking neurons. Finally, I provide preliminary data from electrophysiological recordings in the brains of children with movement disorders that provide some clues as to how the human basal ganglia encode movement.
Biography: Dr. Terence Sanger is the director of the USC Pediatric Movement Disorders Center. His research focuses on understanding the origins of pediatric movement disorders from both a biological and a computational perspective. The primary goal of his research is to discover new methods for treating children with movement disorders. Dr. Sanger coordinates the Childhood Motor Study Group (CMSG) and the NIH Taskforce on Childhood Movement Disorders, and he is principal investigator on several research studies at USC. He runs the pediatric movement disorders clinic at Children's Hospital of Los Angeles (CHLA) in the department of Neurology. His training includes background in Child Neurology, Electrical Engineering, Signal Processing, Control Theory, Neural Networks, and Computational Neuroscience.
Host: Mihailo Jovanovic, mihailo@usc.edu
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 132
Audiences: Everyone Is Invited
Contact: Gerrielyn Ramos
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The Convergence of Machine Learning, Big Data, and Supercomputing
Tue, Aug 29, 2017 @ 10:30 AM - 11:30 PM
Thomas Lord Department of Computer Science, Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Dr. Jeremy Kepner, MIT Lincoln Laboratory Fellow/MIT Lincoln Laboratory Supercomputing Center Founder
Talk Title: The Convergence of Machine Learning, Big Data, and Supercomputing
Abstract: Machine learning, big data and simulation challenges have led to a proliferation of computing hardware and software solutions. Hyperscale data centers, accelerators and programmable logic can deliver enormous performance via a range of analytic environments and data-storage technologies. Effectively exploiting these capabilities for science and engineering requires mathematically rigorous interfaces that allow scientists and engineers to focus on their research and avoid rewriting software each time computing technology changes. Mathematically rigorous interfaces are at the core of the MIT Lincoln Laboratory Supercomputing Center and let it deliver leading-edge technologies to thousands of scientists and engineers. This talk discusses the rapidly evolving computing landscape and how mathematically rigorous interfaces are key to exploiting advanced computing capabilities.
Biography: Dr. Jeremy Kepner is a MIT Lincoln Laboratory Fellow. He founded the Lincoln Laboratory Supercomputing Center and pioneered the establishment of the Massachusetts Green High Performance Computing Center. He has developed novel big data and parallel computing software used by thousands of scientists and engineers worldwide. He has led several embedded computing efforts, which earned him a 2011 R&D 100 Award. Dr. Kepner has chaired SIAM Data Mining, IEEE Big Data, and the IEEE HPEC conference. Dr. Kepner is the author of two bestselling books on Parallel MATLAB and Graph Algorithms. His peer-reviewed publications include works on abstract algebra, astronomy, astrophysics, cloud computing, cybersecurity, data mining, databases, graph algorithms, health sciences, plasma physics, signal processing, and 3D visualization. In 2014, he received Lincoln Laboratory's Technical Excellence Award. Dr. Kepner holds a B.A. in astrophysics from Pomona College and a Ph.D. in astrophysics from Princeton University.
Host: Dr. Viktor K. Prasanna
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Kathy Kassar
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EE 598 Computer Engineering Seminar Series
Thu, Aug 31, 2017 @ 02:00 PM - 03:15 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Rakesh Kumar, University of Illinois at Urbana Champaign
Talk Title: Ultra Low Power Computing in the IoT Era
Series: EE 598 Computer Engineering Seminar Series
Abstract: Wearables, sensors, and Internet of Things (IoT) arguably represent the next frontier of computing. They will be characterized by extremely low power and area requirements. In our recent research, we asked the question: are there opportunities for power and area reduction that are unique to these emerging computing platforms. We answered the question in the affirmative and developed several techniques that appear to be very effective. In this talk, I will focus one such technique--symbolic hardware-software co-analysis--that is applicable over a wide class of applications. Through a novel symbolic execution-based approach, we can determine for a given application the gates in the hardware that the application is guaranteed to not touch. This information can then be used to determine application-specific Vmin, determine application-specific peak power, and, build bespoke processors customized to a given application. If time permits, I will also discuss how architectural ideas such bit serial processors and k-hot pipelining may become promising for the IoT applications.
Biography: Rakesh Kumar is an Associate Professor in the Electrical and Computer Engineering Department at the University of Illinois at Urbana Champaign and a Co-Founder and Chief Architect at Hyperion Core, Inc. He has made contributions in the area of processor design and memory system design that have directly impacted industry and state-of-art. His current research interests are in computer architecture, low power and error resilient computer systems, and approximate computing. He has a B-Tech from IIT Kharagpur and a PhD from University of California at San Diego. He is often seen at a restaurant or hanging out with his very active four-year old.
Host: Xuehai Qian, x04459, xuehai.qian@usc.edu
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 132
Audiences: Everyone Is Invited
Contact: Gerrielyn Ramos
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PhD Defense: Sampling Theory for Graph Signals with Applications to Semi-supervised Learning
Thu, Aug 31, 2017 @ 03:30 PM - 05:30 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Aamir Anis, USC
Talk Title: PhD Defense: Sampling Theory for Graph Signals with Applications to Semi-supervised Learning
Abstract: The representation, processing and analysis of large-scale data as signals defined over graphs has drawn much interest recently. Graphs allow us to embed natural inter-connectivities between data points and exploit them during processing. As a result, graph signal processing has laid a strong foothold in various modern application domains such as machine learning, analysis of social, transportation, web and sensor networks, and even traditional areas such as image processing and video compression. Although powerful, this research area is still in its infancy. Recent efforts have therefore focused on translating well-developed tools of traditional signal processing for handling graph signals.
An important aspect of graph signal processing is defining a notion of frequency for graph signals. A frequency domain representation for graph signals can be defined using the eigenvectors and eigenvalues of variation operators (e.g., graph Laplacian) that take into account the underlying graph connectivity. These operators can also be used to design graph spectral filters. The primary focus of our work is to develop a theory of sampling for graph signals that answers the following questions: 1. When can one recover a graph signal from its samples on a given subset of nodes of the graph? 2. What is the best choice of nodes to sample a given graph signal? Our formulation primarily works under the assumption of bandlimitedness in the graph Fourier domain, which amounts to smoothness of the signal over the graph. The techniques we employ to answer these questions are based on the introduction of special quantities called graph spectral proxies that allow our algorithms to operate in the vertex domain, thereby admitting efficient, localized implementations.
We also explore the sampling problem in the context of designing wavelet filterbanks on graphs. This problem is fundamentally different since one needs to choose a sampling scheme jointly over multiple channels of the filterbank. We explore constraints for designing perfect reconstruction two-channel critically-sampled filterbanks with low-degree polynomial filters, and conclude that such a design is in general not possible for arbitrary graphs. This leads us to propose an efficient technique for designing a critical sampling scheme that, given pre-designed filters, aims to minimize the overall reconstruction error of the filterbank. We also explore M-channel filterbanks over M-block cyclic graphs (that are natural extensions of bipartite graphs), and propose a tree-structured design in a simpler setting when M is a power of 2.
As an application, we study the graph-based semi-supervised learning problem from a sampling theory point of view. A crucial assumption here is that class labels form a smooth graph signal over a similarity graph constructed from the feature vectors. Our analysis justifies this premise by showing that in the asymptotic limit, the bandwidth (a measure of smoothness) of any class indicator signal is closely related to the geometry of the dataset. Using the sampling theory perspective, we also quantitatively show that the label complexity (i.e., the amount of labeling required for perfect prediction of unknown labels) matches its theoretical value, thereby adding to the appeal of graph-based techniques for semi-supervised learning.
Biography: Aamir Anis received his Bachelor and Master of Technology degree in Electronics and Electrical Communication Engineering from the Indian Institute of Technology (IIT), Kharagpur, India, in 2012. He joined the Electrical Engineering department at the University of Southern California (USC), Los Angeles, in 2012, where he has been working towards a Ph.D. degree in Electrical Engineering. He has been the recipient of the Best Student Paper award at ICASSP 2014. His research interests include graph signal processing with applications in machine learning, and multimedia compression.
Host: Dr. Antonio Ortega
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Gloria Halfacre