Events for the 3rd week of November
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*CANCELLED* Fall 2019 Joint CSC@USC/CommNetS-MHI Seminar Series
Mon, Nov 11, 2019 @ 02:00 PM - 03:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Andrea Serrani, Ohio State University
Talk Title: *THIS TALK IS CANCELLED* -- A Geometric Viewpoint on Dynamic Control Allocation
Abstract: Input redundancy in a control system is typically resolved by means of (static) control allocation strategies, where the standing assumptions prescribe that one can define a virtual control input that has the same dimensionality of the regulated output. A control strategy designed on the basis of this virtual input is then distributed across the redundant set of actuators via on-line optimization. Essentially, this scenario confines redundancy to the null-space of the input operator, which can be factored out by projection. On the other hand, for the case of input redundancy with full-rank input operators, multiple independently controllable state-trajectories exist that are compatible with a given reference output. In this talk, a comprehensive geometric characterization of input redundant linear systems is offered. It is shown that intrinsic input redundancy can be exploited in the system inverse rather than in the plant model itself, leading to the definition of novel dynamic control allocation strategies. In the proposed scheme, the steady-state behavior of the system is shaped through dynamic optimization of selected performance criteria penalizing both the control input and the state trajectory, while maintaining invariance of the error-zeroing subspace. Illustrative examples are presented to elucidate the applicability and the significance of the method.
Biography: Andrea Serrani received the Ph.D. degree in Artificial Intelligence Systems from the University of Ancona, Italy, in 1997 and the D.Sc. degree in Systems Science and Mathematics from Washington University in Saint Louis in 2000. Since 2002, he has been with the Department of Electrical and Computer Engineering at The Ohio State University, Columbus, Ohio, where he is currently a Professor and Associate Chair. His research activity spans the fields of control and systems theory, with emphasis on nonlinear and adaptive control, tracking and regulation, and application to aerospace and automotive systems. His latest interests include modeling and control of flapping-wing micro-air vehicles, control of multi-actuated powertrain systems, and guidance and control of hypersonic vehicles. He is the author of more than 150 journal and conference publications, and the co-author (with A. Isidori and L. Marconi) of the book Robust Autonomous Guidance - An Internal Model Approach, published by Springer Verlag. Prof. Serrani serves as the Editor-in-Chief of the IEEE Transactions on Control Systems Technology, and as an Associate Editor the IEEE CSS and IFAC Conference Editorial Boards. He is a past Associate Editor for Automatica and the International Journal of Robust and Nonlinear Control. He was the Program Chair of the 2019 American Control Conference and the General Co-Chair for the 2022 IEEE Conference on Decision and Control.
Host: Mihailo Jovanovic, mihailo@usc.edu
More Info: http://csc.usc.edu/seminars/2019Fall/serrani.html
More Information: 191111_Andrea Serrani_CSC.pdf
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Brienne Moore
Event Link: http://csc.usc.edu/seminars/2019Fall/serrani.html
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Center for Cyber-Physical Systems and Internet of Things and Ming Hsieh Institute Seminar
Wed, Nov 13, 2019 @ 02:00 PM - 03:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Nikil Dutt, Distinguished Professor, University of California, Irvine
Talk Title: Computational Self-awareness and Self-organization: A Paradigm for Building Adaptive, Resilient Computing Platforms
Series: Center for Cyber-Physical Systems and Internet of Things
Abstract: Self-awareness and self-organization have a long history in biology, psychology, medicine, engineering and (more recently) computing. In the past decade this has inspired new self-aware/self-organizing strategies for building resilient computing platforms that can adapt to the (often conflicting) challenges of resiliency, energy, heat, cost, performance, security, etc. in the face of highly dynamic operational behaviors and environmental conditions. I will begin by outlining a computational self-awareness paradigm that enables adaptivity and which supports system resilience. I will show how computational self-awareness can be deployed to achieve cross-layer resilience on the exemplar CyberPhysical-Systems-on-Chip (CPSoC) platform. CPSoC is a new class of sensor-actuator rich many-core computing platform that intrinsically couples on-chip and cross-layer sensing and actuation to support computational self-awareness. Computational self-awareness is achieved through introspection (i.e., modeling and observing its own internal and external behaviors) combined with both reflexive and reflective adaptations via cross-layer physical and virtual sensing and actuations applied across multiple layers of the hardware/software system stack. Next I will outline strategies for combining computational self-awareness with self-organization for life-cycle management of dependable distributed computing platforms. Our ongoing NSF/DFG Information Processing Factory (IPF) project applies principles inspired by factory management that combine self-awareness and self-organization for continuous operation and optimization of highly-integrated-but-distributed embedded computing platforms. While each IPF computational component exhibits autonomy through self-awareness, collections of IPF entities can self-organize; the resulting emergent behavior must be controlled in order to ensure guaranteed service even under strict safety and availability requirements. I will outline strategies such as proactive reconfiguration to mitigate the risk of failures, self-optimization, self-identification using learning classifiers, and chip-level operation with flexible boundaries between critical and best effort regions, all guided by a self-aware planning component. The talk will conclude with the opportunities and challenges arising from adopting computational self-awareness and self-organization for making complex computational systems more resilient and self-adaptive.
Biography: Nikil Dutt is a Distinguished Professor of CS, Cognitive Sciences, and EECS at the University of California, Irvine, and also a Distinguished Visiting Professor of CSE at IIT Bombay, India. He received a PhD from the University of Illinois at Urbana-Champaign (1989). His research interests are in embedded systems, EDA, computer architecture and compilers, distributed systems, healthcare IoT, and brain-inspired architectures and computing. He has received numerous best paper awards and is coauthor of 7 books. Professor Dutt has served as EiC of ACM TODAES and AE for ACM TECS and IEEE TVLSI. He is on the steering, organizing, and program committees of several premier EDA and Embedded System Design conferences and workshops, and has also been on the advisory boards of ACM SIGBED, ACM SIGDA, ACM TECS and IEEE ESL. He is an ACM Fellow, IEEE Fellow, and recipient of the IFIP Silver Core Award.
Host: Jyotirmoy Deshmukh
Location: Hughes Aircraft Electrical Engineering Center (EEB) - 248
Audiences: Everyone Is Invited
Contact: Talyia White
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Processing in Memory (PIM) – Power and Thermal Challenges and Opportunities
Fri, Nov 15, 2019 @ 02:00 PM - 03:00 PM
Ming Hsieh Department of Electrical and Computer Engineering
Conferences, Lectures, & Seminars
Speaker: Mircea Stan, University of Virginia
Talk Title: Processing in Memory (PIM) -“ Power and Thermal Challenges and Opportunities
Abstract: Memory technology is a defining component of modern computing and has a strong impact on performance, power and cost of computing systems. However, the advances in memory performance have not been able to keep up with the performance advances for CPUs, thus leading to what is known as the memory wall. Depending on the application, the memory wall manifests itself both in terms of memory latency, as well as memory bandwidth. An interesting solution to the memory wall problem is to bring memory closer to the processor, or vice-versa, to move some processing capability in the memory itself -“ this leads to variations of what is known as Near-Memory Processing, Processing in Memory (PiM), etc. This seminar will first introduce a PIM taxonomy along several dimensions of the PiM design space; it will then follow with a history of PIM, then go over several recent PIM examples. The seminar will then go in-depth into the Thermal/Power delivery challenges for PIM that are a result of the increased switching activities inherent to the moving of processing into the memory fabric, and exacerbated by the evolution towards 3D integration due to the slow-down of traditional Moore law methods. The seminar will conclude with some novel solutions that alleviate the Thermal/Power challenges for PiM.
Biography: Mircea R. Stan received the Ph.D. (1996) and the M.S. (1994) degrees from UMass Amherst and the Diploma (1984) from the Polytechnic Institute in Bucharest, Romania. Since 1996 he has been with the ECE Department at UVa, where he is now the Virginia Microelectronics Consortium (VMEC) Professor. Prof. Stan is teaching and doing research in the areas of high-performance low-power VLSI, temperature-aware circuits and architecture, embedded systems, spintronics, and nanoelectronics. He leads the High-Performance Low-Power (HPLP) lab, is an associate director of the Center for Automata Processing (CAP) and an assistant director of the Center for Research in Intelligent Storage and Processing-in-Memory (CRISP). He was a visiting faculty at UC Berkeley in 2004-2005, at IBM in 2000, and at Intel in 2002 and 1999. He received the 2018 Influential ISCA Paper Award (For 2003 paper Temperature-aware microarchitecture), the NSF CAREER award in 1997 and was a co-author on best paper awards at LASCAS19, SELSE17, ISQED08, GLSVLSI06, ISCA03 and SHAMAN02 and IEEE Micro Top Picks in 2008 and 2003. He gave keynotes at DCAS18, SOCC16, CogArch16, WoNDP15, iNIS15 and CNNA14. He was the chair of the VSA-TC of IEEE CAS in 2005-2007, general chair for ISLPED06 and GLSVLSI04, TPC chair for SOCC18, ISVLSI17, NanoNets07 and ISLPED05, and on technical committees for numerous conferences. He is Associate Editor-in-Chief for the IEEE TVLSI, Senior Editor for the IEEE TNano, AE for IEEE Design & Test, and was an AE for the IEEE TNano in 2012-2014, IEEE TCAS I in 2004-2008 and for the IEEE TVLSI in 2001-2003. Prof. Stan is a fellow of the IEEE, a member of ACM, and of Eta Kappa Nu, Phi Kappa Phi and Sigma Xi.
Host: Xuehai Qian, xuehai.qian@usc.edu
More Information: 191115_Mircea Stan_CENG.pdf
Location: Ronald Tutor Hall of Engineering (RTH) - 211
Audiences: Everyone Is Invited
Contact: Brienne Moore